Integrated Video Decoder and Dual Mode …

1 Integrated Video Decoder and dual Mode hdmi /MHL receiver Data Sheet ADV7481 FEATURES Analog input Worldwide NTSC/PAL/SECAM color demodulation support with autodetection One 10-bit ADC, 4 oversampling for CVBS, Y/C, and YPbPr 8 analog Video input channels with on-chip antialiasing filter Fully differential, pseudo differential, and single-ended CVBS Video input support STB diagnostics on differential Video inputs CVBS (composite), Y/C (S- Video ), and YPbPr (component) Video input support Fast switching capability between analog inputs Adaptive contrast enhancement (ACE) Excellent common-mode noise rejection capabilities Rovi (Macrovision) copy protection detection Up to 4 V common-mode input range solution Vertical blanking interval (VBI) data slicer Mobile High-Definition Link (MHL) capable receiver High-bandwidth Digital Content Protection (HDCP)

2 Authentication and decryption support 75 MHz maximum pixel clock frequency, allowing HDTV formats up to 720p/1080i at 60 Hz 24 bits per pixel mode supported HDCP repeater support, up to 25 KSVs supported Adaptive TMDS equalizer High-Definition Multimedia Interface ( hdmi ) capable receiver HDCP authentication and decryption support 162 MHz maximum pixel clock frequency, allowing HDTV formats up to 1080p and display resolutions up to UXGA (1600 1200 at 60 Hz) HDCP repeater support, up to 25 KSVs supported Integrated CEC controller, CEC compatible Adaptive TMDS equalizer 5 V detect and Hot Plug assert Component Video processor Any-to-any 3 3 color space conversion (CSC) matrix Contrast/brightness/hue/saturation Video adjustment Timing adjustments controls for horizontal sync (HS)/vertical sync (VS)/data enable (DE)

3 Timing Video mute function Serial digital audio output interface hdmi /MHL audio extraction support Advanced audio muting feature I2S-compatible, left justified, and right justified audio output modes 8-channel TDM output mode available 2 Mobile Industry Processor Interface (MIPI) Camera Serial Interface 2 (CSI-2) transmitters 4-lane transmitter with 4 lanes, 2 lanes, and 1 lane muxing options for hdmi /MHL/SDP/digital input port sources 1-lane transmitter for standard definition processor (SDP) sources 8-bit digital input/output port General 2-wire serial microprocessor unit (MPU) interface (I2C compatible) 40 C to +85 C temperature grade 100-ball, 9 mm 9 mm, RoHS-compliant CSP_BGA package Qualified for automotive applications APPLICATIONS Portable devices Automotive infotainment (head unit and rear seat entertainment systems) hdmi repeaters and Video switches FUNCTIONAL BLOCK DIAGRAM Figure 1.

4 RX0P/RX0 NRX1P/RX1 NRX2P/RX2 NRXCP/RXCNDDC_SCL/CD_PULLUPDDC_SDAHPD/CB USRX_5V/VBUSVBUS_ENCD_SENSECECHDMI/MHLRE CEIVERCPCOREAUDIOPROCESSORSPI SLAVEI2C SLAVEINTERRUPTSCONTROLLERAUDIO OUTPUTFORMATTERSPI_MISOSPI_MOSISPI_SCLKS PI_CSDIAGNOSTIC8-BIT TTLINPUT/OUTPUTAFECECHPDEDID RAMHDCPMHL_SENSECBUSDDCSCLKSDATAALSBINTR Q1 TOINTRQ3I2S_MCLKI2S_LRCLKI2S_SCLKI2S_SDA TACLKAP/CLKANCLKBP/CLKBNDB0P/DB0 NAIN1 TOAIN8P0TO P7 LLCDIAG1 TODIAG4DA0P/DA0 NTODA3P/DA3N4-LANEMIPI CSI-2 TRANSMITTER1-LANEMIPI CSI-2 TRANSMITTERADV7481 SDCORE12046-001 Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable.

5 However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, Box 9106, Norwood, MA 02062-9106, Tel: 2014 Analog Devices, Inc. All rights reserved.

6 Technical Support ADV7481 Data Sheet TABLE OF CONTENTS Features .. 1 Applications .. 1 Functional Block Diagram .. 1 Revision History .. 2 General Description .. 3 Detailed Functional Block Diagram .. 4 Specifications .. 5 Electrical Characteristics .. 5 Analog Video Specifications .. 7 MIPI Video Output Specifications .. 8 Analog Specifications .. 8 Timing Specifications .. 9 Absolute Maximum Ratings .. 13 Thermal Resistance .. 13 ESD Caution .. 13 Pin Configuration and Function Descriptions .. 14 Power Supply Recommendation.

7 17 Power-Up Sequence .. 17 Power-Down Sequence .. 17 Theory of Operation .. 18 Combined hdmi /MHL receiver .. 18 MHL receiver .. 18 hdmi receiver .. 18 Component Processor .. 19 Analog Front End .. 19 Short to Battery Diagnostics .. 19 Standard Definition Processor .. 20 8-Bit Digital Input/Output Port .. 20 Audio Processing .. 21 MIPI CSI-2 Transmitters .. 21 Interrupts .. 21 Outline Dimensions .. 22 Ordering Guide .. 22 Automotive Products .. 22 REVISION HISTORY 6/14 Revision 0: Initial Version Rev. 0 | Page 2 of 22 Data Sheet ADV7481 GENERAL DESCRIPTION The ADV7481 is an Integrated Video Decoder and combined hdmi /MHL receiver .

8 It is targeted at connectivity enabled head units requiring a wired, uncompressed digital audio/ Video link from smartphones and other consumer electronics devices to support streaming and integration of cloud-based multimedia content and applications into an automotive infotainment system. The ADV7481 MHL capable receiver supports a maximum pixel clock frequency of 75 MHz, allowing resolutions up to 720p/1080i at 60 Hz in 24-bit mode. The ADV7481 features a link control bus (CBUS) that handles the link layer, translation layer, CBUS electrical discovery, and display data channel (DDC) commands.

9 The implementation of the MHL sideband channel (MSC) commands by the system processor can be handled either by the I2C bus, or via a dedicated serial peripheral interface (SPI) bus. A dedicated interrupt pin (INTRQ3) is available to indicate that events related to CBUS have occurred. The ADV7481 also features an enable pin (VBUS_EN) to dynamically enable or disable the output of a voltage regulator, which provides a 5 V voltage bus (VBUS) signal to the MHL source. The ADV7481 hdmi capable receiver supports a maximum pixel clock frequency of 162 MHz, allowing HDTV formats up to 1080p, and display resolutions up to UXGA (1600 1200 at 60 Hz).

10 The device integrates a consumer electronics control (CEC) controller that supports the capability discovery and control (CDC) feature. The hdmi input port has dedicated 5 V detect and Hot Plug assert pins. The hdmi /MHL receiver includes an adaptive transition minimized differential signaling (TMDS) equalizer that ensures robust operation of the interface with long cables. The ADV7481 single receiver port is capable of accepting both hdmi and MHL electrical signals. Automatic detection between hdmi and MHL is achieved by using cable impedance detection through the CD_SENSE pin.