Transcription of LTM4622 (Rev. H)
1 LTM46221 Rev. HFor more information registered trademarks and trademarks are the property of their respective APPLICATION FEATURESDESCRIPTIONDual Ultrathin or Single 5A Step-Down DC/DC Module RegulatorThe LT M 4622 is a complete dual step-down switch-ing mode Module (powermodule) regulator in a tiny ultrathin LGA and BGA packages. Included in the pack-age are the switching controller, power FETs, inductor and support components. Operating over an input voltage range of to 20V, the LTM4622 supports an output voltage range of to , set by a single external resistor. Its high efficiency design delivers dual con-tinuous, 3A peak, output current. Only a few ceramic input and output capacitors are LTM4622 supports selectable Burst Mode operation and output voltage tracking for supply rail sequencing. Its high switching frequency and current mode control enable a very fast transient response to line and load changes without sacrificing protection features include input overvoltage , output overcurrent and overtemperature LTM4622 is available with SnPb (BGA) or RoHS com-pliant terminal and 1V Dual Output DC/DC Step-Down Module Output Efficiency vs Load CurrentAPPLICATIONS nComplete Solution in <1cm2 nWide Input Voltage Range.
2 To 20V Input Compatible with VIN Tied to INTVCC to Output Voltage nDual (3A Peak) or Single 5A Output Current n Maximum Total Output Voltage Regulation Error Over Load, Line and Temperature nCurrent Mode Control, Fast Transient Response nExternal Frequency Synchronization nMultiphase Parallelable with Current Sharing nOutput Voltage Tracking and Soft-Start Capability nSelectable Burst Mode Operation nOvervoltage Input and Overtemperature Protection nPower Good Indicators LGA and BGA Packages nGeneral Purpose Point-of-Load Conversion nTelecom, Networking and Industrial Equipment nMedical Diagnostic Equipment nTest and Debug SystemsLOAD CURRENT (A)0 EFFICIENCY (%)80859034622 = 5 VVIN = 12 VDocument TO 20 VVOUT11V, , FVOUT2FB1 COMP1 COMP2 GNDLTM4622 PGOOD1 PGOOD2 VIN2 VIN1 RUN1 RUN2 INTVCCSYNC/MODETRACK/SS1 HFor more information CONFIGURATIONABSOLUTE MAXIMUM RATINGSVIN1, VIN2 .. to 22 VVOUT .. to 6 VPGOOD1, PGOOD2 .. to 18 VRUN1, RUN2.
3 To VIN + , TRACK/SS1 , TRACK/SS2 .. to , COMP1 , COMP2,FB1, FB2 .. to INTVCCO perating Internal Temperature Range(Note 2) .. 40 C to 125 CStorage Temperature Range .. 55 C to 125 CPeak Solder Reflow Body Temperature ..260 C(Note 1)(See Pin Functions, Pin Configuration Table)PART NUMBERPAD OR BALL FINISHPART MARKING*PACKAGE TYPEMSL RATINGTEMPERATURE RANGE (Note 2)DEVICE FINISH CODELT M4622EV#PBFAu (RoHS)LT M4622Ve4 LGA4 40 C to 125 CLT M4622IV#PBFAu (RoHS)LT M4622Ve4 LGA4 40 C to 125 CLT M4622EY#PBFSAC305 (RoHS)LT M4622Ye1 BGA4 40 C to 125 CLT M4622IY#PBFSAC305 (RoHS)LT M4622Ye1 BGA4 40 C to 125 CLT M4622 IYSnPb (63/37)LT M4622Ye0 BGA4 40 C to 125 C Device temperature grade is indicated by a label on the shipping container. Pad or ball finish code is per IPC/JEDEC J-STD-609. BGA Package and Tray Drawings This product is not recommended for second side reflow. This product is moisture sensitive. For more information, go to Recommended BGA PCB Assembly and Manufacturing PACKAGE25-LEAD ( )TJMAX = 125 C, JCtop = 17 C/W, JCbottom = 11 C/W, JB + BA = 22 C/W, JA = 22 C/W, WEIGHT = VIEWCOMP2 SYNC/MODEFREQVOUT1FB1 PGOOD1 TRACK/SS1A51234 PGOOD2FB2 TRACK/SS2 INTVCCRUN2 BCDECOMP1 GNDGNDRUN1 GNDVIN1 VIN1 VIN2 VIN2 VOUT2 BGA PACKAGE25-LEAD ( )TJMAX = 125 C, JCtop = 17 C/W, JCbottom = 11 C/W, JB + BA = 22 C/W, JA = 22 C/W, WEIGHT = VIEWCOMP2 SYNC/MODEFREQVOUT1FB1 PGOOD1 TRACK/SS1A51234 PGOOD2FB2 TRACK/SS2 INTVCCRUN2 BCDECOMP1 GNDGNDRUN1 GNDVIN1 VIN1 VIN2 VIN2 VOUT2 ORDER INFORMATIONLTM46223 Rev.
4 HFor more information CHARACTERISTICS The l denotes the specifications which apply over the full internal operating temperature range (Note 2). Specified as each individual output channel at TA = 25 C, VIN1 = VIN2 = 12V, unless otherwise noted per the typical application shown in Figure Regulator Section: per ChannelVIN1 Input DC DC < VIN1 < Input DC VoltageVIN1 = VIN2 = (RANGE)Output Voltage RangeVIN1 = VIN2 = to (DC)Output Voltage, Total Variation with Line and LoadCIN = 22 F, COUT = 100 F Ceramic, RFB = , MODE = INTVCC, VIN1 = VIN2 = to 20V, IOUT = 0A to Pin On ThresholdRUN Threshold Rising RUN Threshold VIQ(VIN)Input Supply Bias CurrentVIN1 = VIN2 = 12V, VOUT = , MODE = GND VIN1 = VIN2 = 12V, VOUT = , MODE = INTVCC Shutdown, RUN1 = RUN2 = 011 500 45mA A AIS(VIN)Input Supply CurrentVIN1 = VIN2 = 12V, VOUT = , IOUT = (DC)Output Continuous Current Range VIN1 = VIN2 = 12V, VOUT = (Note 3) VOUT (Line)/VOUTLine Regulation AccuracyVOUT = , VIN1 = VIN2 = to 20V, IOUT = VOUT (Load)/VOUTLoad Regulation AccuracyVOUT = , IOUT = 0A to (AC)Output Ripple VoltageIOUT = 0A, COUT = 100 F Ceramic, VIN1 = VIN2 = 12V, VOUT = VOUT(START)
5 Turn-On OvershootIOUT = 0A, COUT = 100 F Ceramic, VIN1 = VIN2 = 12V, VOUT = 30mVtSTARTTurn-On TimeCOUT = 100 F Ceramic, No Load, TRACK/SS = F, VIN1 = VIN2 = 12V, VOUT = VOUTLSPeak Deviation for Dynamic LoadLoad: 0% to 50% to 0% of Full Load, COUT = 100 F Ceramic, VIN1 = VIN2 = 12V, VOUT = 100mVtSETTLES ettling Time for Dynamic Load StepLoad: 0% to 50% to 0% of Full Load, COUT = 100 F Ceramic, VIN1 = VIN2 = 12V, VOUT = 20 sIOUTPKO utput Current LimitVIN1 = VIN2 = 12V, VOUT = at FB PinIOUT = 0A, VOUT = at FB Pin(Note 4) 30nARFBHIR esistor Between VOUT and FB ITRACK/SSTrack Pin Soft-Start Pull-Up CurrentTRACK/SS = AtSSInternal Soft-Start Time10% to 90% Rise Time (Note 4)400700 stON(MIN)Minimum On-Time(Note 4)20nstOFF(MIN)Minimum Off-Time(Note 4)45nsVPGOODPGOOD Trip LevelVFB With Respect to Set Output VFB Ramping Negative VFB Ramping Positive 8 8 14 14 % %LTM46224 Rev. HFor more information CHARACTERISTICSNote 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
6 Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and 2: The LTM4622 is tested under pulsed load conditions such that TJ TA. The LTM4622E is guaranteed to meet performance specifications over the 0 C to 125 C internal operating temperature range. Specifications over the full 40 C to 125 C internal operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTM4622I is guaranteed to meet specifications over the full 40 C to 125 C internal operating temperature range. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental Pull-Down Resistance1mA Load20 VINTVCCI nternal VCC VoltageVIN1 = VIN2 = to Load RegINTVCC Load RegulationICC = 0mA to Frequency1 MHzfSYNCF requency Sync RangeWith Respect to Set Frequency 30%IMODEMODE Input CurrentMODE = INTVCC ANote 3: See output current derating curves for different VIN, VOUT and 4: 100% tested at wafer 5: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions.
7 Junction temperature will exceed 125 C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. The l denotes the specifications which apply over the full internal operating temperature range (Note 2). Specified as each individual output channel at TA = 25 C, VIN1 = VIN2 = 12V, unless otherwise noted per the typical application shown in Figure HFor more information PERFORMANCE CHARACTERISTICS1V Output Transient Output Transient Output Transient ResponseEfficiency vs Load Current at 5 VINE fficiency vs Load Current at 12 VINB urst Mode Efficiency, 12 VIN, CURRENT (A)EFFICIENCY (%)4622 , , , , , , 2 MHzOUTPUT:LOAD CURRENT (A)EFFICIENCY (%)4622 , , , , , , , :VOUT100mV/DIVAC-COUPLEDLOAD STEP1A/DIVVIN = 12 VVOUT = 1 VFS = 1 MHzOUTPUT CAPACITOR = 1 47 F CERAMICLOAD STEP = TO s/DIV4622 G04 VOUT100mV/DIVAC-COUPLEDLOAD STEP1A/DIVVIN = 12 VVOUT = = 1 MHzOUTPUT CAPACITOR = 1 47 F CERAMICLOAD STEP = TO s/DIV4622 G07 VOUT100mV/DIVAC-COUPLEDLOAD STEP1A/DIVVIN = 12 VVOUT = = CAPACITOR = 1 47 F CERAMICLOAD STEP = TO s/DIV4622 G08 LOAD CURRENT (A)30 EFFICIENCY (%) G030 Burst Mode OPERATIONCCMVOUT100mV/DIVAC-COUPLEDLOAD STEP1A/DIVVIN = 12 VVOUT = = 1 MHzOUTPUT CAPACITOR = 1 47 F CERAMICLOAD STEP = TO s/DIV4622 G05 VOUT100mV/DIVAC-COUPLEDLOAD STEP1A/DIVVIN = 12 VVOUT = = 1 MHzOUTPUT CAPACITOR = 1 47 F CERAMICLOAD STEP = TO s/DIV4622 Output Transient Output Transient ResponseEfficiency vs Load Current at CURRENT (A)EFFICIENCY (%)4622 , , , , , :LTM46226 Rev.
8 HFor more information Output Transient Response5V Output Transient ResponseStart-Up with No Load Current AppliedStart-Up with Load Current AppliedRecover from Short-Circuit with No Load Current AppliedShort-Circuit with No Load Current AppliedShort-Circuit with Load Current AppliedSteady-State Output Voltage RippleStart-Up into Pre-Biased OutputTYPICAL PERFORMANCE CHARACTERISTICSVOUT100mV/DIVAC-COUPLEDLO AD STEP1A/DIVVIN = 12 VVOUT = = 2 MHzOUTPUT CAPACITOR = 1 47 F CERAMICLOAD STEP = TO s/DIV4622 G09 VOUT100mV/DIVAC-COUPLEDLOAD STEP1A/DIVVIN = 12 VVOUT = 5 VFS = CAPACITOR = 1 47 F CERAMICLOAD STEP = TO s/DIV4622 G10SW10V/DIVVOUT1V/DIVRUN10V/DIVVIN = 12 VVOUT = = 1 MHzINPUT CAPACITOR = 1 22 FOUTPUT CAPACITOR = 1 22 F + 1 47 F CERAMICSOFT-START CAP = F20ms/DIV4622 G11SW10V/DIVVOUT1V/DIVRUN10V/DIVVIN = 12 VVOUT = = 1 MHzINPUT CAPACITOR = 1 22 FOUTPUT CAPACITOR = 1 22 F + 1 47 F CERAMICSOFT-START CAP = F200ms/DIV4622 G12SW10V/DIVVOUT1V/DIVIIN2A/DIVVIN = 12 VVOUT = = 1 MHzINPUT CAPACITOR = 1 22 FOUTPUT CAPACITOR = 1 22 F + 1 47 F CERAMIC20 s/DIV4622 G13SW10V/DIVVOUT1V/DIVIIN2A/DIVVIN = 12 VVOUT = = 1 MHzINPUT CAPACITOR = 1 22 FOUTPUT CAPACITOR = 1 22 F + 1 47 F CERAMIC20 s/DIV4622 G15 VOUT10mV/DIVAC-COUPLEDSW5V/DIVVIN = 12 VVOUT = = 1 MHzINPUT CAPACITOR = 1 22 FOUTPUT CAPACITOR = 1 22 F + 1 47 F CERAMIC1 s/DIV4622 G16SW10V/DIVVOUT1V/DIVIIN500mA/DIVVIN = 12 VVOUT = = 1 MHzINPUT CAPACITOR = 1 22 FOUTPUT CAPACITOR = 1 22 F + 1 47 F CERAMIC20 s/DIV4622 G14SW10V/DIVVOUT1V/DIVRUN10V/DIVVIN = 12 VVOUT = = 1 MHzINPUT CAPACITOR = 1 22 FOUTPUT CAPACITOR = 1 22 F + 1 47 F CERAMIC50ms/DIV4622 G17 LTM46227 Rev.
9 HFor more information FUNCTIONSVIN1 (D3, E2), VIN2 (A2, B3): Power Input Pins. Apply input voltage between these pins and GND pins. Recommend placing input decoupling capacitance directly between BOTH VIN1 and VIN2 pins and GND pins. Please note the module internal control circuity is running off VIN1. Channel 2 will not work without a voltage higher that present at (C1 to C2, B5, D5): Power Ground Pins for Both Input and Output (C3): Internal Regulator Output. The internal power drivers and control circuits are powered from this voltage. This pin is internally decoupled to GND with a F low ESR ceramic capacitor. No additional external decoupling capacitor (C5): Mode Select and External Synchronization Input. Tie this pin to ground to force continuous synchronous operation at all output loads. Floating this pin or tying it to INTVCC enables high effi-ciency Burst Mode operation at light loads.
10 Drive this pin with a clock to synchronize the LTM4622 switching frequency. An internal phase-locked loop will force the bottom power NMOS s turn on signal to be synchronized with the rising edge of the clock signal. When this pin is driven with a clock, forced continuous mode is automati-cally (D1, E1), VOUT2 (A1, B1): Power Output Pins of Each Switching Mode Regulator. Apply output load between these pins and GND pins. Recommend placing output decoupling capacitance directly between these pins and GND (C4): Frequency is set internally to 1 MHz. An exter-nal resistor can be placed from this pin to GND to increase frequency, or from this pin to INTVCC to reduce frequency. See the Applications Information section for frequency (D2), RUN2 (B2): Run Control Input of Each Switching Mode Regulator Channel. Enables chip opera-tion by tying RUN above Tying this pin below 1V shuts down the specific regulator channel. Do not float this (D4), PGOOD2 (B4): Output Power Good with Open-Drain Logic of Each Switching Mode Regulator Channel.