Omni ision Advanced Information

1 Version , July 8, 2005 Proprietary to OmniVision Technologies1 Advanced InformationPreliminary DatasheetOV7670/OV7171 CMOS VGA (640x480) CAMERACHIPTM with OmniPixel TechnologyOmniision General Description The OV7670/OV7171 CAMERACHIPTM is a low voltageCMOS image sensor that provides the full functionality ofa single-chip VGA camera and image processor in a smallfootprint package. The OV7670/OV7171 providesfull-frame, sub-sampled or windowed 8-bit images in awide range of formats, controlled through the SerialCamera Control Bus (SCCB) product has an image array capable of operating atup to 30 frames per second (fps) in VGA with completeuser control over image quality, formatting and output datatransfer. All required image processing functions,including exposure control, gamma, white balance, colorsaturation, hue control and more, are also programmablethrough the SCCB interface.

2 In addition, OmniVisionCAMERACHIPs use proprietary sensor technology toimprove image quality by reducing or eliminating commonlighting/electrical sources of image contamination, suchas fixed pattern noise (FPN), smearing, blooming, etc., toproduce a clean, fully stable color High sensitivity for low-light operation Low operating voltage for embedded portable apps Standard SCCB interface compatible with I2C interface Supports VGA, CIF, and resolutions lower than CIF for RGB (GRB 4:2:2, RGB565/555), YUV (4:2:2) and YCbCr (4:2:2) formats VarioPixel method for sub-sampling Automatic image control functions including: Automatic Exposure Control (AEC), Automatic Gain Control (AGC), Automatic White Balance (AWB), Automatic Band Filter (ABF), and Automatic Black-Level Calibration (ABLC) Image quality controls including color saturation, hue, gamma, sharpness (edge enhancement), and anti-blooming ISP includes noise reduction and defect correction Supports LED and flash strobe mode Supports scaling Lens shading correction Flicker (50/60 Hz) auto detection Saturation level auto adjust (UV adjust) Edge enhancement level auto adjust De-noise level auto adjustOrdering Information Pb Note.

3 The OV7670/OV7171 uses a lead-free (Color, lead-free)24 pin CSP2OV07171-VL2A (B&W, lead-free)24 pin CSP2 Applications Cellular and Picture Phones Toys PC Multimedia Digital Still CamerasKey Specifications Figure 1 OV7670/OV7171 Pin Diagram (Top View)Array Element (VGA)640 x 480 Power SupplyDigital +10% to to < 20 ATemperatureRangeOperation-30 C to 70 CStable Image0 C to 50 COutput Formats (8-bit) YUV/YCbCr 4:2:2 RGB565/555 GRB 4:2:2 Raw RGB DataLens Size1/6"Chief Ray Angle24 Maximum ImageTransfer Rate30 fps for V/Lux-secS/N Ratio40 dBDynamic RangeTBDScan ModeProgressiveElectronics ExposureUp to 510:1 (for selected fps)Pixel m x mDark Current12 mV/s at 60 CWell Capacity17 K eImage mm x mmPackage Dimensions3785 m x 4235 mOV7670/OV7171 AGNDSIO_CA1A2A4A3D1D0D3D2A5B1B2B4B3B5C1D 1D2 AVDDSIO_DPWDNVSYNCVREF2 HREFDVDDC2 VREF1D4D5E1E2E4E3E5F1F2F4F3F5 DOGNDDOVDDPCLKSTROBERESETD6 XCLKD72 Proprietary to OmniVision TechnologiesVersion , July 8, 2005OV7670/OV7171 CMOS VGA (OmniPixel ) CAMERACHIP OmniisionFunctional Description Figure 2 shows the functional block diagram of the OV7670/OV7171 image sensor.

4 The OV7670/OV7171 includes: Image Sensor Array (total array of 656 x 488 pixels, with active pixels 640 x 480 in YUV mode) Analog Signal Processor A/D Converters Test Pattern Generator Digital Signal Processor (DSP) Image Scaler Timing Generator Digital Video Port SCCB Interface LED and Strobe Flash Control OutputFigure 2 Functional Block DiagramA/DGD[7:0]BR50/60 HzAutoDetectTestPatternGeneratorVideoPor tImageScalerDSPB ufferBuffer(Lens shading correction, de-noise, white/ black pixel correction, auto white balance, etc.)FIFOA nalogProcessingImage Array(656 x 488)Column Sense AmpExposure/GainDetectExposure/GainContr olSCCBI nterfaceRegistersVideo Timing GeneratorClockSIO_CSIO_DSTROBEPWDNRESETV SYNCPCLKHREFXCLKRow SelectFunctional DescriptionVersion , July 8, 2005 Proprietary to OmniVision Technologies3 OmniisionImage Sensor ArrayThe OV7670/OV7171 sensor has an image array of656 x 488 pixels for a total of 320,128 pixels, of which640 x 480 pixels are active (307,200 pixels).

5 Figure 3shows a cross-section of the image sensor 3 Image Sensor ArrayTiming GeneratorIn general, the timing generator controls the followingfunctions: Array control and frame generation Internal timing signal generation and distribution Frame rate timing Automatic Exposure Control (AEC) External timing outputs (VSYNC, HREF/HSYNC, and PCLK)Analog Signal ProcessorThis block performs all analog image functions including: Automatic Gain Control (AGC) Automatic White Balance (AWB)A/D ConvertersAfter the Analog Processing block, the bayer pattern Rawsignal is fed to a 10-bit analog-to-digital (A/D) convertershared by G and BR channels. This A/D converteroperates at speeds up to 12 MHz and is fully synchronousto the pixel rate (actual conversion rate is related to theframe rate).In addition to the A/D conversion, this block also has thefollowing functions: Digital Black-Level Calibration (BLC) Optional U/V channel delay Additional A/D range controlsIn general, the combination of the A/D Range Multiplierand A/D Range Control sets the A/D range and maximumvalue to allow the user to adjust the final image brightnessas a function of the individual Pattern GeneratorThe Test Pattern Generator features the following: 8-bar color bar pattern Fade-to-gray color bar pattern Shift "1" in output pinDigital Signal Processor (DSP)This block controls the interpolation from Raw data toRGB and some image quality control.

6 Edge enhancement (a two-dimensional high pass filter) Color space converter (can change Raw data to RGB or YUV/YCbCr) RGB matrix to eliminate color cross talk Hue and saturation control White/black pixel correction De-noise Lens shading correction Programmable gamma control Transfer 10-bit data to 8-bitImage ScalerThis block controls all output and data formatting requiredprior to sending the image out. This block scalesYUV/RGB output from VGA to CIF and almost any sizeunder Video PortRegister bits COM2[1:0] increase IOL/IOH drive currentand can be adjusted as a function of the customer InterfaceThe Serial Camera Control Bus (SCCB) interface controlsthe CAMERACHIP operation. Refer to OmniVisionTechnologies Serial Camera Control Bus (SCCB)Specification for detailed usage of the serial control and Strobe Flash Control OutputThe OV7670/OV7171 has a Strobe mode that allows it towork with an external flash and DescriptionVersion , July 8, 2005 Proprietary to OmniVision Technologies4 OmniisionPin Description Table 1 Pin DescriptionPin NumberNamePin TypeFunction/DescriptionA1 AVDDP owerAnalog power supplyA2 SIO_DI/OSCCB serial interface data I/OA3 SIO_CInputSCCB serial interface clock inputA4D1aa.

7 D[7:0] for 8-bit YUV or RGB (D[7] MSB, D[0] LSB)OutputYUV/RGB video component output bit[1]A5D3 OutputYUV/RGB video component output bit[3]B1 PWDNI nput (0)bb. Input (0) represents an internal pull-down Down Mode Selection0: Normal mode1: Power down modeB2 VREF2 ReferenceReference voltage - connect to ground using a F capacitorB3 AGNDP owerAnalog groundB4D0 OutputYUV/RGB video component output bit[0]B5D2 OutputYUV/RGB video component output bit[2]C1 DVDDP owerPower supply (+ VDC) for digital logic coreC2 VREF1 ReferenceReference voltage - connect to ground using a F capacitorD1 VSYNCO utputVertical sync outputD2 HREFO utputHREF outputE1 PCLKO utputPixel clock outputE2 STROBEO utputLED/strobe control outputE3 XCLKI nputSystem clock inputE4D7 OutputYUV/RGB video component output bit[7]E5D5 OutputYUV/RGB video component output bit[5]F1 DOVDDP owerDigital power supply for I/O ( ~ )F2 RESETI nput (0)Clears all registers and resets them to their default : Normal mode1.

8 Reset modeF3 DOGNDP owerDigital groundF4D6 OutputYUV/RGB video component output bit[6]F5D4 OutputYUV/RGB video component output bit[4]5 Proprietary to OmniVision TechnologiesVersion , July 8, 2005OV7670/OV7171 CMOS VGA (OmniPixel ) CAMERACHIP OmniisionElectrical Characteristics NOTE:Exceeding the Absolute Maximum ratings shown above invalidates all AC and DC electrical specifications and mayresult in permanent device 2 Absolute Maximum RatingsAmbient Storage Temperature -40 C to +95 CSupply Voltages (with respect to Ground) VVDD-C3 VAll Input/Output Voltages (with respect to Ground) to VDD-IO+ Temperature, Surface-mount process245 CESD Rating, Human Body model2000 VTable 3 DC Characteristics (-30 C < TA < 70 C)SymbolParameterConditionMinTypMaxUnitV DD-ADC supply voltage Analog supply voltage Digital Core supply voltage I/O power (Operating) CurrentSee Note aa.

9 VDD-A = , VDD-C = , VDD-IO = IDDA = {IDD-IO+ IDD-C + IDD-A}, fCLK = 24 MHz at 30 fps YUV output, no I/O loading10 + 8bb. IDD-C = 10mA, IDD-A = 8mA, without loadingmAIDDS-SCCBS tandby Current See Note cc. VDD-A = , VDD-C = , VDD-IO = IDDS-SCCB refers to a SCCB-initiated Standby, while IDDS-PWDN refers to a PWDN pin-initiated Standby1mAIDDS-PWDNS tandby Current 1020 AVIHI nput voltage x VDD-IOVVILI nput voltage x VDD-IOVVOHO utput voltage x VDD-IOVVOLO utput voltage x VDD-IOVIOHO utput current HIGHSee Note dd. Standard Output Loading = 25pF, 8mAIOLO utput current LOW15mAILI nput/Output LeakageGND to VDD-IO 1 AElectrical CharacteristicsVersion , July 8, 2005 Proprietary to OmniVision Technologies6 OmniisionTable 4 Functional and AC Characteristics (-30 C < TA < 70 C)SymbolParameterMinTypMaxUnitFunctional CharacteristicsA/DDifferential Non-Linearity+ 1/2 LSBA/DIntegral Non-Linearity+ 1 LSBAGCR ange30dBRed/Blue Adjustment Range12dBInputs (PWDN, CLK, RESET)fCLKI nput Clock Frequency102448 MHztCLKI nput Clock Period2142100nstCLK:DCClock Duty Cycle455055%tS:RESETS etting time after software/hardware reset1mstS:REGS ettling time for register change (10 frames required)300msSCCB Timing (see Figure 4)fSIO_CClock Frequency400 KHztLOWC lock Low stHIGHC lock High Period600nstAASIO_C low to Data Out valid100900nstBUFBus free time before new stHD.

10 STASTART condition Hold time600nstSU:STASTART condition Setup time600nstHD:DATData-in Hold time0 stSU:DATData-in Setup time100nstSU:STOSTOP condition Setup time600nstR, tFSCCB Rise/Fall times300nstDHData-out Hold time50nsOutputs (VSYNC, HREF, PCLK, and D[7:0] (see Figure 5, Figure 6, Figure 7, Figure 9, and Figure 10)tPDVPCLK[ ] to Data-out Valid5nstSUD[7:0] Setup time15nstHDD[7:0] Hold time8nstPHHPCLK[ ] to HREF[ ]05nstPHLPCLK[ ] to HREF[ ]05nsAC Conditions: VDD: VDD-C = , VDD-A = , VDD-IO = Rise/Fall Times: I/O: 5ns, MaximumSCCB: 300ns, Maximum Input Capacitance: 10pf Output Loading: 25pF, to fCLK: 24 MHz7 Proprietary to OmniVision TechnologiesVersion , July 8, 2005OV7670/OV7171 CMOS VGA (OmniPixel ) CAMERACHIP OmniisionTiming Specifications Figure 4 SCCB Timing DiagramFigure 5 Horizontal TimingFigure 6 VGA Frame TimingSIO_CtSU:STAtHD:STASIO_DINSIO_DOUT tFtLOWtHIGHtRtHD:DATtSU:DATtAAtDHtBUFtSU :STOPCLKD[7:0]Last ByteFirst ByteLast BytetHDtSUtPCLKtPDVHREF(Row Data)tPHLtPHLVSYNCD[7:0]HREF510 x tLINERow 1 Row 2 Row 479 Row 0 Invalid DataInvalid DataHSYNC3 x tLINE17 tLINEtLINE = 784 tP144 tPP0 - P63980 tP45 tP640 tP19 tPNOTE.)