SigmaDSP Digital Audio Processor Data Sheet …

1 SigmaDSP Digital Audio ProcessorData Sheet adau1452 Rev. A Document Feedback Information furnished by analog devices is believed to be accurate and reliable. However, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of analog devices . Trademarks and registered trademarks are the property of their respective owners.

2 One Technology Way, Box 9106, Norwood, MA 02062-9106, : 2013 2014 analog devices , Inc. All rights reserved. Technical Support FEATURES Qualified for automotive applications Fully programmable Audio DSP for enhanced sound processing Features SigmaStudio, a proprietary graphical programming tool for the development of custom signal flows MHz, 32-bit SigmaDSP core at V Up to 6144 SIMD instructions per sample at 48 kHz 40 kWords of parameter/ data RAM Up to 800 ms Digital Audio delay pool at 48 kHz Audio I/O and routing 4 serial input ports, 4 serial output ports 48-channel.

3 32-bit Digital I/O up to a sample rate of 192 kHz Flexible configuration for TDM, I2S, left and right justified formats, and PCM Up to 8 stereo ASRCs from 1:8 up to :1 ratio and 139 dB DNR Stereo S/PDIF input and output Four PDM microphone input channels Multichannel, byte addressable TDM serial ports Clock oscillator for generating master clock from crystal Integer PLL and flexible clock generators Integrated die temperature sensor I2C and SPI control interfaces (both slave and master) Standalone operation Self boot from serial EEPROM 6-channel, 10-bit SAR auxiliary control ADC 14 multipurpose pins for Digital controls and outputs On-chip regulator for generating V from V supply 72-lead, 10 mm 10 mm LFCSP package with mm exposed pad Temperature range.

4 40 C to +105 C APPLICATIONS Automotive Audio processing Head units Navigation systems Rear seat entertainment systems DSP amplifiers (sound system amplifiers) Commercial and professional Audio processing FUNCTIONAL BLOCK DIAGRAM S/PDIFTRANSMITTERS/PDIFRECEIVER8 2-CHANNELASYNCHRONOUSSAMPLE RATECONVERTERSINPUTCLOCKDOMAINS( 4)OUTPUTCLOCKDOMAINS( 4)CLOCKOSCILLATORGPIO/AUX ADCPLLI2C/SPISLAVEXTALIN/MCLKXTALOUTSPI/ I2C*BCLK_IN3 TO BCLK_IN0/LRCLK_IN3 TO LRCLK_IN0(INPUT CLOCK PAIRS)SELFBOOTSPDIFINSPDIFOUTCLKOUTSDATA _IN3 TO SDATA_IN0(48-CHANNELDIGITAL AUDIOINPUTS)SDATA_OUT3 TO SDATA_OUT0(48-CHANNELDIGITAL AUDIOOUTPUTS)REGULATORADAU1452 PLLFILTMP13 TO MP0 AUXADC5 TOAUXADC0 BCLK_OUT3 TO BCLK_OUT0 LRCLK_OUT3 TO LRCLK_OUT0(OUTPUT CLOCK PAIRS)TEMPERATURESENSORTHD_PVDRIVETHD_MI 2C/SPIMASTERSPI/I2C*DIGITALMIC INPUTSERIAL DATAINPUT PORTS( 4)SERIAL DATAOUTPUT PORTS( 4)DEJITTER ANDCLOCK GENERATOR*SPI/I2C INCLUDES THE FOLLOWING PIN FUNCTIONS.

5 SS_M, MOSI_M, SCL_M, SCLK_M, SDA_M, MISO_M, MISO, SDA, SCLK, SCL, MOSI, ADDR1, SS, AND ADDR0 AUDIOROUTING MATRIXOUTPUT AUDIOROUTING AUDIOPROCESSING CORERAM, ROM, WATCHDOG,MEMORY PARITY CHECK Figure 1. adau1452 data Sheet Rev. A | Page 2 of 176 TABLE OF CONTENTS Features .. 1 Applications .. 1 Functional Block Diagram .. 1 Revision History .. 2 General Description .. 3 Specifications .. 4 Electrical Characteristics .. 6 Timing Specifications .. 7 Absolute Maximum Ratings .. 15 Thermal Characteristics.

6 15 Maximum Power Dissipation .. 15 ESD Caution .. 15 Pin Configuration and Function Descriptions .. 16 Theory of Operation .. 20 System Block Diagram .. 20 Overview .. 20 Initialization .. 22 Master Clock, PLL, and Clock 25 Power Supplies, Voltage Regulator, and Hardware Reset .. 29 Temperature Sensor 31 Slave Control Ports .. 31 Master Control Ports .. 37 Self Boot .. 38 Audio Signal Routing .. 40 Serial data 50 Flexible TDM Interface .. 60 Asynchronous Sample Rate Converters .. 65 S/PDIF Interface.

7 66 Digital PDM Microphone Interface .. 68 Multipurpose Pins .. 69 Auxiliary ADC .. 72 SigmaDSP Core .. 72 Software Features .. 75 Pin Drive Strength, Slew Rate, and Pull Configuration .. 77 Global RAM and Control Register Map .. 78 Random Access Memory .. 78 Control Registers .. 78 Control Register Details .. 89 PLL Configuration Registers .. 89 Clock Generator Registers .. 93 Power Reduction Registers .. 97 Audio Signal Routing Registers .. 100 Serial Port Configuration Registers .. 106 Flexible TDM Interface Registers.

8 109 DSP Core Control Registers .. 113 Debug and Reliability Registers .. 118 DSP Program Execution Registers .. 126 Multipurpose Pin Configuration 130 ASRC Status and Control Registers .. 135 Auxiliary ADC Registers .. 138 S/PDIF Interface Registers .. 139 Hardware Interfacing Registers .. 152 Soft Reset Register .. 170 Applications Information .. 171 PCB Design Considerations .. 171 Typical Applications Block Diagram .. 172 Example PCB Layout .. 173 PCB Manufacturing Guidelines .. 174 Outline Dimensions.

9 175 Ordering Guide .. 175 Automotive Products .. 175 REVISION HISTORY 1/14 Rev. 0 to Rev. A Changed S/PDIF Transceiver and Receiver Maximum Audio Sample Rate from 192 kHz to 96 kHz; Table 9 and Table 10 .. 9 10/13 Revision 0: Initial Version data Sheet adau1452 Rev. A | Page 3 of 176 GENERAL DESCRIPTIONThe adau1452 is an automotive-qualified Audio Processor that far exceeds the Digital signal processing capabilities of earlier SigmaDSP devices . Its restructured hardware architecture is optimized for efficient Audio processing.

10 The Audio processing algorithms are realized in sample-by-sample and block- by-block paradigms, which can both be executed simultaneously in a signal processing flow created using the graphical programming tool, SigmaStudio . The new Digital signal Processor (DSP) core architecture enables some types of Audio processing algorithms to be executed using significantly fewer instructions than were required on previous SigmaDSP generations, leading to vastly improved code efficiency. The V, 32-bit DSP core can run at frequencies of up to MHz and execute up to 6144 instructions per sample at the standard sample rate of 48 kHz.