Triple, 200 mA, Low Noise, High PSRR Voltage Regulator ...

1 Triple, 200 mA, Low noise , high PSRR Voltage Regulator Data Sheet ADP322/ADP323. FEATURES TYPICAL APPLICATION CIRCUITS. Fixed (ADP322) and adjustable output (ADP323) options ADP322. VBIAS. Bias Voltage range (VBIAS): V to V TO VBIAS. +. LDO input Voltage range (VIN1/VIN2, VIN3): V to V 1 F. Three 200 mA low dropout Voltage regulators (LDOs) TO VIN1/VIN2. +. 16-lead, 3 mm 3 mm LFCSP 1 F. ON. LDO 1 VOUT1. EN1 +. Initial accuracy: 1% OFF EN LD1 1 F. Stable with 1 F ceramic output capacitors VBIAS. No noise bypass capacitor required ON. LDO 2 VOUT2. EN2. 3 independent logic controlled enables OFF EN LD2. +. 1 F. Overcurrent and thermal protection VBIAS. TO VIN3. Key specifications + LDO 3 VOUT3. 1 F ON. high PSRR EN3. OFF EN LD3. +. 1 F. 76 dB PSRR up to 1 kHz 09288-001. GND. 70 dB PSRR at 10 kHz 60 dB PSRR at 100 kHz Figure 1. Typical Application Circuit for ADP322.

2 40 dB PSRR at 1 MHz Low output noise VBIAS. ADP323. 24 V rms typical output noise at VOUT = V TO VBIAS. 43 V rms typical output noise at VOUT = V +. 1 F. Excellent transient response TO VIN1/VIN2. Low dropout Voltage : 110 mV at 200 mA load +. VOUT1. 1 F LDO 1. 85 A typical ground current at no load, all LDOs enabled EN1. ON FB1 +. 1 F. OFF EN LD1. 100 s fast turn on circuit VBIAS. Guaranteed 200 mA output current per Regulator VOUT2. 40 C to +125 C junction temperature LDO 2. ON FB2 +. EN2 1 F. APPLICATIONS OFF EN LD2. VBIAS. Mobile phones TO VIN3. VOUT3. +. Digital cameras and audio devices 1 F ON. LDO 3. +. FB3. 1 F. Portable and battery-powered equipment EN3. OFF EN LD3. Portable medical devices 09288-053. GND. Post dc-to-dc regulation Figure 2. Typical Application Circuit for ADP323. GENERAL DESCRIPTION. The ADP322/ADP323 200 mA triple output LDOs combine high The ADP322/ADP323 are available in a miniature 16-lead, 3 mm.

3 PSRR, low noise , low quiescent current, and low dropout Voltage 3 mm LFCSP package and are stable with tiny 1 F 30% ceramic to extend the battery life of portable devices and are ideally suited output capacitors providing the smallest possible board area for for wireless applications with demanding performance and board a wide variety of portable power needs. space requirements. The ADP322 is available in output Voltage combinations ranging The ADP322/ADP323 PSRR is greater than 60 dB for frequencies from V to V and offers overcurrent and thermal protection as high as 100 kHz while operating with a low headroom Voltage . to prevent damage in adverse conditions. The ADP323 adjustable The ADP322/ADP323 offer much lower noise performance than triple LDO can be configured for any output Voltage between competing LDOs without the need for a noise bypass capacitor. V and 5 V with two resistors for each output.

4 Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, Box 9106, Norwood, MA 02062-9106, license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 2010 2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support ADP322/ADP323 Data Sheet TABLE OF CONTENTS. Features .. 1 Theory of Operation .. 16. Applications .. 1 Applications Information .. 17. Typical Application 1 ADIsimPower Design Tool .. 17. General Description .. 1 Capacitor Selection.

5 17. Revision History .. 2 Undervoltage Lockout .. 18. 3 Enable Feature .. 18. Input and Output Capacitor, Recommended Specifications .. 4 noise Reduction of the ADP323 in Adjustable Mode .. 19. Absolute Maximum Ratings .. 5 Current-Limit and Thermal Overload Protection .. 20. Thermal Data .. 5 Thermal 20. Thermal Resistance .. 5 Printed Circuit Board Layout 22. ESD Caution .. 5 Outline Dimensions .. 23. Pin Configurations and Function Descriptions .. 6 Ordering Guide .. 23. Typical Performance Characteristics .. 8. REVISION HISTORY. 10/2018 Rev. D to Rev. E 9/2011 Rev. 0 to Rev. A. Change to Figure 56 .. 19 Added Figure 2, Renumbered Sequentially ..1. Changes to Ordering Guide .. 23 Changes to Theory of Operation 15. Added Figure 45, Renumbered Sequentially .. 15. 3/2017 Rev. C to Rev. D Changes to Ordering Guide .. 21. Updated Outline Dimensions .. 23. Changes to Ordering Guide.

6 23 9/2010 Revision 0: Initial Version 10/2015 Rev. B to Rev. C. Changes to Ordering Guide .. 23. 11/2014 Rev. A to Rev. B. Changes to Features 1. Changes to Table 1 .. 3. Changes to Figure 30, Figure 31, Figure 32, and Figure 33;. Added Figure 34; Renumbered Sequentially .. 12. Added Figure 35 and Figure 36; Changes to Figure 38, Figure 39, and Figure 40 .. 13. Added ADIsimPower Design Tool Section .. 17. Added noise Reduction of the ADP323 in Adjustable Mode Section .. 19. Rev. E | Page 2 of 24. Data Sheet ADP322/ADP323. SPECIFICATIONS. VIN1/VIN2 = VIN3 = (VOUT + V) or V (whichever is greater), VBIAS = V, EN1, EN2, EN3 = VBIAS, IOUT1 = IOUT2 = IOUT3 = 10 mA, CIN = COUT1 = COUT2 = COUT3 = 1 F, and TA = 25 C, unless otherwise noted. Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit Voltage RANGE. Input Bias Voltage Range VBIAS TJ = 40 C to +125 C V.

7 Input LDO Voltage Range VIN1/VIN2/VIN3 TJ = 40 C to +125 C V. CURRENT. Ground Current with All IGND IOUT = 0 A 85 A. regulators On IOUT = 0 A, TJ = 40 C to +125 C 160 A. IOUT = 10 mA 120 A. IOUT = 10 mA, TJ = 40 C to +125 C 220 A. IOUT = 200 mA 250 A. IOUT = 200 mA, TJ = 40 C to +125 C 380 A. Bias Voltage Input Current IBIAS 66 A. TJ = 40 C to +125 C 140 A. Shutdown Current IGND-SD EN1 = EN2 = EN3 = GND A. EN1 = EN2 = EN3 = GND, TJ = 40 C to +125 C A. FEEDBACK INPUT CURRENT FBIN A. Voltage ACCURACY. Output Voltage Accuracy VOUT 1 +1 %. (ADP322). 100 A < IOUT < 200 mA, VIN = (VOUT + V) to V, 2 +2 %. TJ = 40 C to +125 C. Feedback Voltage Accuracy VFB V. (ADP323)1. 100 A < IOUT < 200 mA, VIN = (VOUT + V) to V, V. TJ = 40 C to +125 C. LINE REGULATION VOUT/ VIN VIN = (VOUT + V) to V %/V. VIN = (VOUT + V) to V, TJ = 40 C to +125 C + %/V. LOAD REGULATION2 VOUT/ IOUT IOUT = 1 mA to 200 mA %/mA.

8 IOUT = 1 mA to 200 mA, TJ = 40 C to +125 C %/mA. DROPOUT VOLTAGE3 VDROPOUT VOUT = V mV. IOUT = 10 mA 6 mV. IOUT = 10 mA, TJ = 40 C to +125 C 9 mV. IOUT = 200 mA 110 mV. IOUT = 200 mA, TJ = 40 C to +125 C 170 mV. START-UP TIME4 TSTART-UP VOUT = V, all VOUT initially off, enable any LDO 240 s VOUT = V 100 s VOUT = V, one VOUT initially on, enable second or 160 s third LDO. VOUT = V 20 s CURRENT LIMIT THRESHOLD5 ILIMIT 250 360 600 mA. THERMAL SHUTDOWN. Thermal Shutdown Threshold TSSD TJ rising 155 C. Thermal Shutdown Hysteresis TSSD-HYS 15 C. Rev. E | Page 3 of 24. ADP322/ADP323 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit EN INPUT. EN Input Logic high VIH V VBIAS V V. EN Input Logic Low VIL V VBIAS V V. EN Input Leakage Current VI-LEAKAGE EN1 = EN2 = EN3 = VIN or GND A. EN1 = EN2 = EN3 = VIN or GND, 1 A. TJ = 40 C to +125 C. UNDERVOLTAGE LOCKOUT UVLO.

9 Input Bias Voltage (VBIAS) UVLORISE V. Rising Input Bias Voltage (VBIAS) UVLOFALL V. Falling Hysteresis UVLOHYS 180 mV. OUTPUT noise OUTNOISE 10 Hz to 100 kHz, VIN = 5 V, VOUT = V 50 V rms 10 Hz to 100 kHz, VIN = 5 V, VOUT = V 43 V rms 10 Hz to 100 kHz, VIN = V, VOUT = V 40 V rms 10 Hz to 100 kHz, VIN = V, VOUT = V 24 V rms 10 Hz to 100 kHz, VIN = V, VOUT = V 14 V rms POWER SUPPLY REJECTION RATIO PSRR VIN = V, VOUT = V, IOUT = 100 mA. 100 Hz 70 dB. 1 kHz 70 dB. 10 kHz 70 dB. 100 kHz 60 dB. 1 MHz 40 dB. VIN = V, VOUT = V, IOUT = 100 mA. 100 Hz 68 dB. 1 kHz 62 dB. 10 kHz 68 dB. 100 kHz 60 dB. 1 MHz 40 dB. 1. Accuracy when VOUTx is connected directly to FBx. When the VOUTx Voltage is set by external feedback resistors, the absolute accuracy in adjust mode depends on the tolerances of the resistors used. 2. Based on an end point calculation using 1 mA and 200 mA loads.

10 3. The dropout Voltage specification applies only to output voltages greater than V. Dropout Voltage is defined as the input to output Voltage differential when the input Voltage is set to the nominal output Voltage . 4. Start-up time is defined as the time between the rising edge of ENx to VOUTx being at 90% of its nominal value. 5. Current-limit threshold is defined as the current at which the output Voltage drops to 90% of the specified typical value. For example, the current limit for a V. output Voltage is defined as the current that causes the output Voltage to drop to 90% of V, that is, V. INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS. Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit MINIMUM INPUT AND OUTPUT CAPACITANCE1 CMIN TA = 40 C to +125 C F. CAPACITOR ESR RESR TA = 40 C to +125 C 1 . 1. The minimum input and output capacitance must be greater than F over the full range of operating conditions.