BF998; BF998R Silicon N-channel dual-gate MOS-FETs

1 DATA SHEETP roduct specificationSupersedes data of April 19911996 Aug 01 DISCRETE SEMICONDUCTORS BF998; BF998 RSilicon N-channel dual-gate MOS-FETs1996 Aug 012 NXP SemiconductorsProduct specificationSilicon N-channel dual-gate MOS-FETsBF998; BF998 RFEATURES Short channel transistor with high forward transfer admittance to input capacitance ratio Low noise gain controlled amplifier up to 1 VHF and UHF applications with 12 V supply voltage, such as television tuners and professional communications type field effect transistor in a plastic microminiature SOT143B or SOT143R package with source and substrate interconnected. The transistors are protected against excessive input voltage surges by integrated back-to-back diodes between gates and device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or , bsource2ddrain3g2gate 24g1gate outline (SOT143B)and symbol; code: , halfpages,bdg1g24321 Top viewMAM039 handbook, halfpages,bdg1g2 MAM040 3412 Top outline (SOT143R)and symbol; code: REFERENCE DATA voltage 12 VIDdrain current 30mAPtottotal power dissipation 200mW yfs forward transfer admittance24 mSCig1-sinput capacitance at gate pFCrsreverse transfer capacitancef = 1 MHz25 fFFnoise figuref = 800 MHz1 dBTjoperating junction temperature 150 C1996 Aug 013 NXP SemiconductorsProduct specificationSilicon N-channel dual-gate MOS-FETsBF998; BF998 RLIMITING VALUESIn accordance with the Absolute Maximum Rating System (IEC 134).

2 Notes1. Device mounted on a ceramic substrate, 8 mm 10 mm Device mounted on a printed-circuit voltage 12 VIDdrain current 30mA IG1gate 1 current 10mA IG2gate 2 current 10mAPtottotal power dissipation; BF998up to Tamb=60 C; see ; note 1 200mWup to Tamb=50 C; see ; note 2 200mWPtottotal power dissipation; BF998R up to Tamb=50 C; see ; note 1 200mWTstgstorage temperature 65+150 CTjoperating junction temperature 150 Power derating curves; , halfpage01000200100200(mW)Ptot max(1)(2)MLA198 Tamb( C)o(1) Ceramic substrate.(2) Printed-circuit Power derating curve; , halfpage01000200100200(mW)Ptot maxMGA002 Tamb ( C)1996 Aug 014 NXP SemiconductorsProduct specificationSilicon N-channel dual-gate MOS-FETsBF998; BF998 RTHERMAL CHARACTERISTICSN otes1. Device mounted on a ceramic substrate, 8 mm 10 mm Device mounted on a printed-circuit CHARACTERISTICSTj=25 C; unless otherwise Measured under pulse CHARACTERISTICSC ommon source; Tamb=25 C; VDS=8V; VG2-S=4V; ID= j-athermal resistance from junction to ambient in free air; BF998note 1460K/Wnote 2500K/WRth j-athermal resistance from junction to ambient in free air; BF998R note 1500 UNIT V(BR)G1-SSgate 1-source breakdown voltageVG2-S=VDS=0; IG1-SS= 10 mA620V V(BR)G2-SSgate 2-source breakdown voltageVG1-S=VDS=0; IG2-SS= 10 mA620V V(P)G1-Sgate 1-source cut-off voltageVG2-S=4V; VDS=8V; ID=20 A V(P)G2-Sgate 2-source cut-off voltageVG1-S=0; VDS=8V; ID=20 A currentVG2-S=4V; VDS=8V; VG1-S=0; note1 218mA IG1-SSgate 1 cut-off currentVG2-S=VDS=0; VG1-S= 5V 50nA IG2-SSgate 2 cut-off currentVG1-S=VDS=0.

3 VG2-S= 5V UNIT yfs forward transfer admittancef = 1 kHz2124 mSCig1-sinput capacitance at gate 1f = 1 MHz capacitance at gate 2f = 1 MHz pFCosoutput capacitancef = 1 MHz pFCrsreverse transfer capacitancef = 1 MHz 25 fFFnoise figuref = 200 MHz; GS=2mS; BS=BSopt dBf=800 MHz; GS= mS; BS=BSopt dB1996 Aug 015 NXP SemiconductorsProduct specificationSilicon N-channel dual-gate MOS-FETsBF998; Output characteristics; typical , halfpage01024081641220 MGE8132468 VDS (V)ID(mA) V0 V V V V V VVG1-S =VG2-S=4V; Tamb=25 Transfer characteristics; typical , halfpage 1124081641220 MGE81503 V2 V1 V0 VVG2-S = 4 VVG1 (V)ID(mA)VDS=8V; Tamb=25 current as a function of gate 1 voltage; typical , halfpage 1600 400 800 120040024081641220 MGE8140maxtypminVG1 (mV)ID(mA)VDS=8V; VG2-S=4V; Tamb=25 transfer admittance as a function of drain current; typical , halfpage0203006121824 MGE811161284ID (mA) V4 V1 V2 V3 VVG2-S = 0 V|yfs|(mS)VDS=8V; Tamb=25 Aug 016 NXP SemiconductorsProduct specificationSilicon N-channel dual-gate MOS-FETsBF998; transfer admittance as a function of gate 1 voltage; typical ; Tamb=25 , halfpage 113006121824 MGE8120VG1 (V)0 V1 V2 V3 VVG2-S = 4 V|yfs|(mS) Output capacitance as a function of drain-source voltage; typical , (pF)681012 VDS (V)12 mA10 mA8 mAVG2-S=4V; f=1 MHz; Tamb=25 Gate 1 input capacitance as a function of gate 1-source voltage; typical , halfpage (pF)VG1-S (V)VDS=8V; VG2-S= 4 V; f = 1 MHz; Tamb=25 Gate 1 input capacitance as a function of gate 2-source voltage; typical , halfpage642 Cis(pF) S (V)VDS=8V; VG1-S= 0 V; f = 1 MHz.

4 Tamb=25 Aug 017 NXP SemiconductorsProduct specificationSilicon N-channel dual-gate MOS-FETsBF998; Input admittance as a function of the frequency; typical ; VG2-S=4V; ID=10mA; Tamb=25 (mS)f (MHz) Reverse transfer admittance and phase as a function of frequency; typical ; VG2-S=4V; ID=10mA; Tamb=25 ( S)f (MHz) rsyrs(deg) rs Forward transfer admittance and phase as a function of frequency; typical ; VG2-S=4V; ID=10mA; Tamb=25 (mS)yfsf (MHz)(deg) fs fs Output admittance as a function of the frequency; typical ; VG2-S=4V; ID=10mA; Tamb=25 (mS)f (MHz)bosgos1996 Aug 018 NXP SemiconductorsProduct specificationSilicon N-channel dual-gate MOS-FETsBF998; BF998 Rhandbook, full pagewidthMGE802330 k k 360 100 k 140 k 1 nF1 nF47 F20 H1 nF10 pFD2BB405330 k 1 nF1 nFVtunoutput50 pF50 inputVDDVDDVagc47 k 1 nF1 nF1 nFL2L11 nF15 pFD1BB405 VtuninputVDD=12V; GS=2mS; GL= mS.

5 L1 = 45 nH; 4 turns mm copper wire, internal diameter 4 = 160 nH; 3 turns mm copper wire, internal diameter 8 at approximately half a turn from the cold side, to adjust GL= mS. C1 adjusted for GS= Gain control test circuit at f = 200 Aug 019 NXP SemiconductorsProduct specificationSilicon N-channel dual-gate MOS-FETsBF998; Gain control test circuit at f = 800 ; GS= mS; GL= = L4 = 200 nH; 11 turns mm copper wire, without spacing, internal diameter 3 = 2 cm, silvered mm copper wire, 4 mm above ground = 2 cm, silvered mm copper wire, 4 mm above ground , full k 360 100 k 1 nF1 nF1 nF50 output1 nF50 inputVDDVDDVDDVagc270 k 140 k 1 nF1 nFL4L1L21 nFC12 to 18 to pFC44 to 40 pFL31996 Aug 0110 NXP SemiconductorsProduct specificationSilicon N-channel dual-gate MOS-FETsBF998; BF998 Rhandbook, halfpage0100 50 40 30 20 10 MGE808 Gtr(dB)2468 Vagc (V)IDSS = Automatic gain control characteristics measured in circuit of ; f=200 MHz.

6 Tamb=25 , halfpage0100 50 40 30 20 10 MGE807 Gtr(dB)2468 Vagc (V)IDSS = Automatic gain control characteristics measured in circuit of ; f=800 MHz; Tamb=25 Aug 0111 NXP SemiconductorsProduct specificationSilicon N-channel dual-gate MOS-FETsBF998; BF998 RPACKAGE OUTLINESUNITA REFERENCESOUTLINEVERSIONEUROPEANPROJECTI ONISSUE DATE IEC JEDEC (mm are the original dimensions)SOT143B04-11-1606-03-16012 mmscalePlastic surface-mounted package; 4 leadsSOT143 BDHEEABvMAXAA1 LpQdetail XcywMe1eB2134b1bp1996 Aug 0112 NXP SemiconductorsProduct specificationSilicon N-channel dual-gate MOS-FETsBF998; BF998 RUNITA REFERENCESOUTLINEVERSIONEUROPEANPROJECTI ONISSUE DATE IEC JEDEC (mm are the original dimensions)SOT143 RSC-61AA04-11-1606-03-16012 mmscalePlastic surface-mounted package; reverse pinning; 4 leadsSOT143 RDHEEABvMAXAA1 LpQdetail XcywMe1eB1243b1bp1996 Aug 0113 NXP SemiconductorsProduct specificationSilicon N-channel dual-gate MOS-FETsBF998; BF998 RDATA SHEET STATUSN otes1.

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