1.8V - 3.3V Low-Power Precision CMOS Oscillators

1 2017 Microchip Technology 1 DSC1001/3/4 Features Frequency Range: 1 MHz to 150 MHz Exceptional Stability over Temperature- 10 ppm, 20 ppm, 25 ppm, 50 ppm Operating Voltage- to Operating Temperature Range- Ext. Industrial 40 C to 105 C- Industrial 40 C to 85 C- Commercial 20 C to 70 C Low Operating and Standby Current-6 mA Operating (1 MHz)-15 A Standby (Max.) Ultra Miniature mm x mm x mm x mm x mm x mm x mm x mm x mm MIL-STD 883 Shock and Vibration Resistant Pb Free, RoHS, Reach SVHC Compliant AEC-Q100 Reliability QualifiedApplications Mobile Applications Consumer Electronics Portable Electronics DVR, CCTV, Surveillance Cameras Low Profile Applications Industrial ApplicationsBenefits Pin for Pin Drop-In Replacement for Industry Standard Oscillators Semiconductor Level Reliability.

2 Significantly Higher than Quartz Short Mass Production Lead Times Longer Battery Life/Reduced Power Consumption Compact Plastic Package Cost EffectiveGeneral DescriptionThe DSC1001/3/4 is a silicon MEMS based cmos family of Oscillators that offers excellent jitter and stability performance over a wide range of supply voltages and temperatures. The device operates from 1 MHz to 150 MHz with supply voltages between to volts and temperature ranges up to 40 C to 105 DSC1001/3/4 incorporate an all silicon resonator that is extremely robust and nearly immune to stress related fractures, common to crystal based sacrificing the performance and stability required of today s systems, a crystal-less design allows for a higher level of reliability, making the DSC1001/3/4 ideal for rugged, industrial, and portable applications where stress, shock, and vibration can damage quartz crystal based systems.

3 Available in industry standard packages, the DSC1001/3/4 can be dropped-in to the same PCB footprint as standard crystal DSC1003 and DSC1004 have the same functionality and performance as the DSC1001, but feature higher output drives of 25 pF and 40 pF, TypesDSC1001/3/4 CDFN/DFN(Top View)STANDBY# Low-Power Precision cmos OscillatorsDSC1001/3/4DS20005529B-page 2 2017 Microchip Technology DiagramPFDVCOFRAC-NPLLOUTPUTVDDGND(PIN1) STANDBY#PFDVCOFRAC-NPFDVCOPLLRESONATORVD DGND(PIN1) 2017 Microchip Technology 3 DSC1001/3 CHARACTERISTICSA bsolute Maximum Ratings Input Voltage (VIN) .. to VDD + Protection .. 4 kV HBM, 200V MM, kV CDMR ecommended Operating ConditionsSupply Voltage (VDD) .. + to + Load (ZL).

4 R > 10 k , C 15 pF Notice: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device 1-1:DC CHARACTERISTICS Electrical Characteristics: VDD = to ; TA = +85 C unless otherwise 150 MHzSingle FrequencyFrequency Tolerance f 10ppmIncludes frequency variations due to initial tolerance, temperature and power supply voltage 20 25 50 Aging f 5ppm1 year @ +25 CSupply Current, StandbyIDD 15 AT = +25 COutput Startup Time (Note 1) tSU = +25 COutput Disable TimetDA 20100ns Output Duty CycleSYM45 55% Input Logic Level x VDD V Input Logic Level LowVIL x VDDV VDD = Current, No LoadIDD MHzCL = 0 pF, RL = ,T = +25 C MHz MHz MHzOutput Logic Level x VDD V 6 mA, DSC1004, CL = 40 x VDD 6 mA, DSC1003, CL = 25 x VDD 4 mA, DSC1001, CL = 15 pFOutput Logic Level LowVOL x VDDV6 mA, DSC1004, CL = 40 pF x VDD6 mA, DSC1003, CL = 25 pF x VDD4 mA, DSC1001, CL = 15 pFNote 1.

5 TSU is time to stable output frequency after VDD is applied. tSU and tEN (after EN is asserted) are identical :Measured over 50k clock 4 2017 Microchip Technology Transition Rise TimetR , CL = 15 pFT = +25 C,20% to 80% , CL = 25 pF , C2 = 40 pFOutput Transition Fall TimetF , CL = 15 pFT = +25 C,20% to 80% , CL = 25 pF , C2 = 40 pFJitter, Max. Cycle-to-CycleJCC 60 psf = 100 MHz (Note 2)Period JitterJP 1015psRMSf = 100 MHz (Note 2)VDD = Current, No LoadIDD MHzCL = 0 pF, RL = ,T = +25 C MHz MHz MHzOutput Logic Level x VDD V 6 mA, DSC1004, CL = 40 x VDD 6 mA, DSC1003, CL = 25 x VDD 4 mA, DSC1001, CL = 15 pFOutput Logic Level LowVOL x VDDV6 mA, DSC1004, CL = 40 pF x VDD6 mA, DSC1003, CL = 25 pF x VDD4 mA, DSC1001, CL = 15 pFOutput Transition Rise TimetR , CL = 15 pFT = +25 C,20% to 80% , CL = 25 pF , C2 = 40 pFOutput Transition Fall TimetF , CL = 15 pFT = +25 C,20% to 80% , CL = 25 pF , C2 = 40 pFTABLE 1-1:DC CHARACTERISTICS (CONTINUED)Electrical Characteristics: VDD = to ; TA = +85 C unless otherwise 1:tSU is time to stable output frequency after VDD is applied.

6 TSU and tEN (after EN is asserted) are identical :Measured over 50k clock cycles. 2017 Microchip Technology 5 DSC1001/3/4 Jitter, Max. Cycle-to-CycleJCC 50 psf = 100 MHz (Note 2)Period JitterJP 510psRMSf = 100 MHz (Note 2)VDD = Current, No LoadIDD MHzCL = 0 pF, RL = ,T = +25 C MHz MHz MHzOutput Logic Level x VDD V 8 mA, DSC1004, CL = 40 x VDD 6 mA, DSC1003, CL = 25 x VDD 4 mA, DSC1001, CL = 15 pFOutput Logic Level LowVOL x VDDV8 mA, DSC1004, CL = 40 pF x VDD6 mA, DSC1003, CL = 25 pF x VDD4 mA, DSC1001, CL = 15 pFOutput Transition Rise TimetR , CL = 15 pFT = +25 C,20% to 80% , CL = 25 pF , C2 = 40 pFOutput Transition Fall TimetF , CL = 15 pFT = +25 C,20% to 80% , CL = 25 pF , C2 = 40 pFJitter, Max. Cycle-to-CycleJCC 50 psf = 100 MHz (Note 2)Period JitterJP 510psRMSf = 100 MHz (Note 2)TABLE 1-1:DC CHARACTERISTICS (CONTINUED)Electrical Characteristics: VDD = to ; TA = +85 C unless otherwise 1:tSU is time to stable output frequency after VDD is applied.

7 TSU and tEN (after EN is asserted) are identical :Measured over 50k clock SPECIFICATIONS (Note 1) RangesOperating Temperature Range (T)TA 40 +105 COrdering Option L 40 +85 COrdering Option I 20 +70 COrdering Option EJunction Operating Temperature TJ +150 C Storage Temperature RangeTA 55 +150 C Soldering Temperature RangeTS +260 C40 sec. maxNote 1:The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air ( , TA, TJ, JA). Exceeding the maximum allowable power dissipation will cause the device operating junction temperature to exceed the maximum +150 C rating. Sustained junction temperatures above +150 C can impact the device 6 2017 Microchip Technology Inc.

8 2017 Microchip Technology 7 DSC1001/3 DESCRIPTIONSThe descriptions of the pins are listed in Table 2-1 and Table 2-2. TABLE 2-1:CDFN PACKAGE PIN FUNCTION TABLE Pin NumberSymbolDescription1 STANDBY#Standby input (Section Standby Function )2 GNDP ower supply ground3 OUTO scillator output4 VDDP ositive power supplyTABLE 2-2:DFN PACKAGE PIN FUNCTION TABLE Pin NumberSymbolDescription1 STANDBY#Standby input (Section Standby Function )2 GNDP ower supply ground3 OUTO scillator output4 VDDP ositive power supplyCenter PadNCTie to GND or do not 8 2017 Microchip Technology PERFORMANCE CHARACTERISTICSNote:The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed.

9 In some graphs or tables, the data presented may be outside the specified operating range ( , outside specified power supply range) and therefore outside the warranted 3-1:Supply Current. FIGURE 3-2:Rise 3-3:Rise 3-4:Supply 3-5:Fall 3-6:Fall Time. 2017 Microchip Technology 9 DSC1001/3 WAVEFORMVIL 1/fo OUTPUT STANDBY# tENtDAtFtRVIHVOHVOLFIGURE 4-1:Output FunctionStandby# (Pin 1)Output (Pin 3)High LevelOutput ONOpen (no connect)Output ONLow LevelHigh ImpedanceDSC1001/3/4DS20005529B-page 10 2017 Microchip Technology F VDD 15pF IDD *VSD 4123*VSD = Standby# Logic Level Input FIGURE 5-1:DSC1001/3/4 Test Circuit. 2017 Microchip Technology 11 DSC1001/3 LAYOUT (RECOMMENDED) VDDC1 GNDS tandbyOutputVia to GND LayerVia to GND LayerFIGURE 6-1:Recommended Board Layout for DSC1001/3 12 2017 Microchip Technology REFLOW PROFILE60-150 Sec20-40 Sec60-180 Sec8 min maxPre heatRe owCoolTimeTemperature ( C)3C/Sec C 217 C 150 C 25 C 260 C 3C/Sec Sec20-40 Sec60-180 Sec8 min maxPre heatRe owCoolTimeTemperature ( C)3C/Sec C 217 C 150 C 25 C 260 C 60-150 Sec20-40 Sec60-180 Sec8 min maxPre heatRe owCoolTimeTemperature ( C)3C/Sec C 217 C 150 C 25 C 260 C 3C/Sec 7-1:Solder Reflow 1 @ 260 C refer to JSTD-020 CRamp-Up Rate (200 C to Peak Temp)3 C/sec.

10 Time 150 C to 200 C60 to 180 maintained above 217 C60 to 150 Temperature255 C to 260 CTime within 5 C of Actual Peak 20 to 40 Rate6 C/sec. 25 C to Peak Temperature8 minutes max. 2017 Microchip Technology 13 DSC1001/3 Marking InformationExample4-Lead CDFN/DFN*XXXXXX0 SSSDCPYYWW04000000603 DCP1121 code, customer-specific information, or frequency in MHz without printed decimal point YYear code (last digit of calendar year) YYYear code (last 2 digits of calendar year) WWWeek code (week of January 1 is week 01 ) NNNA lphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) *This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package. , , Pin one index is identified by a dot, delta up, or delta down (triangle mark).