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1K SPI Bus Serial EEPROM - Microchip Technology

2008 Microchip Technology 125AA010A/25LC010 ADevice Selection TableFeatures: 10 MHz max. Clock Frequency Low-Power CMOS Technology :- Max. Write Current: 5 mA at , 10 MHz- Read Current: 5 mA at , 10 MHz- Standby Current: 5 A at 128 x 8-bit Organization Write Page mode (up to 16 bytes) Sequential Read Self-Timed Erase and Write Cycles (5 ms max.) Block Write Protection:- Protect none, 1/4, 1/2 or all of array Built-In Write Protection:- Power-on/off data protection circuitry- Write enable latch- Write-protect pin High Reliability:- Endurance: 1,000,000 Erase/Write cycles- Data retention: > 200 years- ESD protection: > 4000V Temperature Ranges Supported: Pb-Free and RoHS CompliantPin Function TableDescription:The Microchip Technology Inc.

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Transcription of 1K SPI Bus Serial EEPROM - Microchip Technology

1 2008 Microchip Technology 125AA010A/25LC010 ADevice Selection TableFeatures: 10 MHz max. Clock Frequency Low-Power CMOS Technology :- Max. Write Current: 5 mA at , 10 MHz- Read Current: 5 mA at , 10 MHz- Standby Current: 5 A at 128 x 8-bit Organization Write Page mode (up to 16 bytes) Sequential Read Self-Timed Erase and Write Cycles (5 ms max.) Block Write Protection:- Protect none, 1/4, 1/2 or all of array Built-In Write Protection:- Power-on/off data protection circuitry- Write enable latch- Write-protect pin High Reliability:- Endurance: 1,000,000 Erase/Write cycles- Data retention: > 200 years- ESD protection: > 4000V Temperature Ranges Supported: Pb-Free and RoHS CompliantPin Function TableDescription:The Microchip Technology Inc.

2 25XX010A* is a 1 KbitSerial Electrically Erasable Programmable Read-OnlyMemory ( EEPROM ). The memory is accessed via asimple Serial Peripheral Interface (SPI) compatibleserial bus. The bus signals required are a clock input(SCK) plus separate data in (SI) and data out (SO)lines. Access to the device is controlled through a ChipSelect (CS) to the device can be paused via thehold pin (HOLD). While the device is paused,transitions on its inputs will be ignored, with theexception of Chip Select, allowing the host to servicehigher priority 25XX010A is available in standard packagesincluding 8-lead PDIP and SOIC, and advancedpackages including 8-lead MSOP, 8-lead TSSOP androtated TSSOP, 8-lead 2x3 DFN, and 6-lead Types (not to scale)Part NumberVCC RangePage SizeTemp.

3 BytesIP, MS, SN, ST, MC, BytesI, EP, MS, SN, ST, MC, OT- Industrial (I):-40 Cto +85 C- Automotive (E):-40 Cto+125 CNameFunctionCSChip Select InputSOSerial Data OutputWPWrite-ProtectVSSG roundSISerial Data InputSCKS erial Clock InputHOLDHold InputVCCS upply VoltageCSSOWPVSS12348765 VCCHOLDSCKSI(P, SN)VSS123465 VDDCSSO (OT)PDIP/SOICX-Rotated TSSOPHOLDVCCCSSO12348765 SCKSIVSSWP(X/ST)CSSOWPVSS12348765 VCCHOLDSCKSICSSOWPVSS12348765 VCCHOLDSCKSI (ST, MS)TSSOP/MSOPSOT-23 SCKSICSSOWPVSS12348765 VCCHOLDSCKSI(MC)DFN1K SPI Bus Serial EEPROM *25XX010A is used in this document as a generic part number for the25AA010A and the 2 2008 Microchip Technology CHARACTERISTICSA bsolute Maximum Ratings( ) inputs and outputs to VCC + temperature.

4 -65 C to 150 CAmbient temperature under bias ..-40 C to 125 CESD protection on all pins .. 4 kVTABLE 1-1:DC CHARACTERISTICS NOTICE: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to thedevice. This is a stress rating only and functional operation of the device at those or any other conditions above thoseindicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for anextended period of time may affect device CHARACTERISTICSI ndustrial (I):TA = -40 C to +85 C VCC = to (E):TA = -40 C to +125 C VCC = to ConditionsD001 VIH1 High-level input VCCVCC+1VD002 VIL1 Low-level VCCVVCC (Note) VCCVVCC < (Note)D004 VOLLow-level outputvoltage = mAD005 VOL = mA, VCC < outputvoltageVCC VIOH = -400 AD007 ILII nput leakage current 1 ACS = VCC, VIN = VSS TO VCCD008 ILOO utput leakage current 1 ACS = VCC, VOUT = VSS TO VCCD009 CINTI nternal capacitance(all inputs and outputs) 7pFTA = 25 C, CLK = MHz,VCC = (Note)D010 ICC ReadOperating current = ; FCLK = MHz; SO = OpenVCC = ; FCLK = MHz.

5 SO = OpenD011 ICC Write 53mAmAVCC = = current 51 A ACS = VCC = , Inputs tied to VCC or VSS, TA = +125 CCS = VCC = , Inputs tied to VCC or VSS, TA = +85 CNote:This parameter is periodically sampled and not 100% tested. 2008 Microchip Technology 325AA010A/25LC010 ATABLE 1-2:AC CHARACTERISTICSAC CHARACTERISTICSI ndustrial (I):TA = -40 C to +85 CVCC = to (E): TA = -40 C to +125 C VCC = to Conditions1 FCLKC lock frequency VCC < VCC < VCC < setup time50100150 VCC < VCC < VCC < hold time100200250 VCC < VCC < VCC < disable time50 ns 5 TsuData setup time102030 VCC < VCC < VCC < hold time204050 VCC < VCC < VCC < rise time 100ns(Note 1)8 TFCLK fall time 100ns(Note 1)

6 9 THIC lock high s s VCC < VCC < VCC < low s s VCC < VCC < VCC < delay time50 ns 12 TCLEC lock enable time50 ns 13 TVOutput valid from clock low VCC < VCC < VCC < hold time0 ns(Note 1)15 TDISO utput disable time VCC < (Note 1) VCC < (Note 1) VCC < (Note 1)16 THSHOLD setup time204080 VCC < VCC < VCC < 1:This parameter is periodically sampled and not 100% :This parameter is not tested but ensured by characterization. For endurance estimates in a specificapplication, please consult the Total Endurance Model which can be obtained from our web :TWC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycleis 4 2008 Microchip Technology 1-3.

7 AC TEST CONDITIONS17 THHHOLD hold time204080 VCC < VCC < VCC < low to output high-Z3060160 VCC < (Note 1) VCC < (Note 1) VCC < (Note 1)19 THVHOLD high to output valid3060160 VCC < VCC < VCC < write cycle time (byte or page) 5ms(NOTE3)21 Endurance1M E/W Cycles(NOTE2)TABLE 1-2:AC CHARACTERISTICS (CONTINUED)AC CHARACTERISTICSI ndustrial (I):TA = -40 C to +85 CVCC = to (E): TA = -40 C to +125 C VCC = to ConditionsNote 1:This parameter is periodically sampled and not 100% :This parameter is not tested but ensured by characterization.

8 For endurance estimates in a specificapplication, please consult the Total Endurance Model which can be obtained from our web :TWC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycleis Waveform: VLO = VHI = VCC - (Note 1)VHI = (Note 2)CL = 100 pF Timing Measurement Reference VCCNote 1:For VCC :For VCC > 2008 Microchip Technology 525AA010A/25LC010 AFIGURE 1-1:HOLD TIMINGFIGURE 1-2: Serial INPUT TIMINGFIGURE 1-3: Serial OUTPUT TIMINGCSSCKSOSIHOLD171616171918 Don t Care5 High-Impedancen + 2n + 1nn - 1nn + 2n + 1nnn - 1 CSSCKSISO6587113 LSB inMSB inHigh-Impedance12 Mode 1,1 Mode 0,024 CSSCKSO10913 MSB outISB out315 Don t CareSIMode 1,1 Mode 0,01425AA010A/25LC010 ADS21832E-page 6 2008 Microchip Technology of OperationThe 25XX010A is a 128 byte Serial EEPROM designedto interface directly with the Serial Peripheral Interface(SPI) port of many of today s popular microcontrollerfamilies, including Microchip s PIC microcontrollers.

9 Itmay also interface with microcontrollers that do nothave a built-in SPI port by using discrete I/O linesprogrammed properly in firmware to match the SPIprotocol. The 25XX010A contains an 8-bit instruction device is accessed via the SI pin, with data beingclocked in on the rising edge of SCK. The CS pin mustbe low and the HOLD pin must be high for the 2-1 contains a list of the possible instructionbytes and format for device operation. All instructions,addresses, and data are transferred MSb first, LSb (SI) is sampled on the first rising edge of SCKafter CS goes low.

10 If the clock line is shared with otherperipheral devices on the SPI bus, the user can assertthe HOLD input and place the 25XX010A in HOLD mode. After releasing the HOLD pin, operation willresume from the point when the HOLD was SequenceThe device is selected by pulling CS low. The 8-bitREAD instruction is transmitted to the 25XX010 Afollowed by an 8-bit address. See Figure 2-1 for the correct READ instruction and address are sent,the data stored in the memory at the selected addressis shifted out on the SO pin. Data stored in the memoryat the next address can be read sequentially bycontinuing to provide clock pulses to the slave.


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