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AN92 - Bias Voltage and Current Sense Circuits for …

Application Note 92AN92-1 Bias Voltage and Current Sense Circuits forAvalanche PhotodiodesFeeding and Reading the APDJim Williams, Linear Technology CorporationNovember 2002 INTRODUCTIONA valanche photodiodes (APDs) are widely utilized in laserbased fiberoptic systems to convert optical data intoelectrical form. The APD is usually packaged with a signalconditioning amplifier in a small module. An APD receivermodule and attendant circuitry appears in Figure 1. TheAPD module (figure right) contains the APD and a trans-impedance ( , Current -to- Voltage ) amplifier. An opticalport permits interfacing fiberoptic cable to the APD sphotosensitive portion. The module s compact construc-tion facilitates a direct, low loss connection between theAPD and the amplifier, necessary because of the extremelyhigh speed data rates receiver module needs support circuitry. The APDrequires a relatively high Voltage bias (figure left) tooperate, typically 20V to 90V.

practice, it may be desirable to derive the APD bias voltage regulator’s feedback signal from the indicated point, elimi-nating the 1kΩ shunt resistor’s voltage drop.1 Verifying accuracy involves loading the APD bias line with 100nA to 1mA and noting output agreement.2 DC Coupled Current Monitor Figure 5’s DC coupled current monitor ...

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Transcription of AN92 - Bias Voltage and Current Sense Circuits for …

1 Application Note 92AN92-1 Bias Voltage and Current Sense Circuits forAvalanche PhotodiodesFeeding and Reading the APDJim Williams, Linear Technology CorporationNovember 2002 INTRODUCTIONA valanche photodiodes (APDs) are widely utilized in laserbased fiberoptic systems to convert optical data intoelectrical form. The APD is usually packaged with a signalconditioning amplifier in a small module. An APD receivermodule and attendant circuitry appears in Figure 1. TheAPD module (figure right) contains the APD and a trans-impedance ( , Current -to- Voltage ) amplifier. An opticalport permits interfacing fiberoptic cable to the APD sphotosensitive portion. The module s compact construc-tion facilitates a direct, low loss connection between theAPD and the amplifier, necessary because of the extremelyhigh speed data rates receiver module needs support circuitry. The APDrequires a relatively high Voltage bias (figure left) tooperate, typically 20V to 90V.

2 This Voltage is set by the biassupply s programming port. This programming voltagemay also include corrections for the APD s temperaturedependent response. Additionally, it is desirable to moni-tor the APD s average Current (figure center), which indi-, LTC and LT are registered trademarks of Linear Technology optical signal strength. This information can becombined with feedback techniques to maintain opticalsignal strength at an optimal level. The feedback loop soperating characteristics can also determine if deleteriousdegradation of optical components has occurred, permit-ting corrective measures to be taken. APD Current istypically between 100nA and 1mA, a dynamic range of10,000:1. This measurement, which should be taken withan accuracy inside 1%, normally must occur in the APD s high side, complicating circuit design. This restrictionapplies because the APD s anode is committed to thereceiver amplifier s summing APD module, an expensive and electrically delicatedevice, must be protected from damage under all condi-tions.

3 The support circuitry must never produce spuriousoutputs which could destroy the APD module. Particularattention must be devoted to the bias supply s dynamicresponse under programming and power-up/down condi-tions. Finally, it is desirable to power the support circuitryfrom a single 5V RECEIVER MODULEAPDBIASINPUTTYPICALY20V TO 90 VAMPLIFIEROUTPUT IS GROUNDREFERRED APD BIAS CURRENTMONITOR. APD CURRENTTYPICALLY 100nA TO 1mAOPTICALINPUTAPDAPDCURRENTMONITORPROGR AMMINGINPUT5 VINAN92 F01 APDBIAS POWERSUPPLYF igure 1. Avalanche Photodiode (APD) Module (Figure Right) Contains APD, Amplifier andOptical Port. Power Supply (Figure Left) Provides APD Bias Voltage . APD Current Monitor(Figure Center) Operates at High Common Mode Voltage , Complicating Signal ConditioningApplication Note 92AN92-2 The bias Voltage and Current measurement requirementsdescribed above constitute a significant design challengeand are addressed in the following Current Monitor Circuits (with Problems)Figure 2 s straightforward approaches attempt to addressthe Current monitor problem.

4 Figure 2a uses an instru-mentation amplifier powered by a separate 35V rail tomeasure across the 1k Current shunt. Figure 2b issimilar but derives its power supply from the APD bias both approaches function, they do not meet APDcurrent sensing requirements. APD bias voltages canrange to 90V, exceeding the amplifier s supply and com-mon mode Voltage limits. Additionally, the measurement swide dynamic range requires the single rail poweredamplifier to swing within 100 V of zero, which is imprac-tical. Finally, it is desirable for the amplifiers to operatefrom a single, low Voltage 3 s circuit divides down the high common modecurrent shunt Voltage , theoretically permitting the 5 Vpowered amplifier to extract the Current measurementover a 20V to 90V APD bias range. In practice, thisarrangement introduces prohibitive errors, primarily be-cause the desired signal is also divided down. The currentmeasurement information is buried in the divider resistor stolerance, even with components.

5 The desired 1%accuracy over a 100mA to 1nA range cannot be , although the amplifier operates from a single 5 Vsupply, it cannot swing all the way to is clear from the preceding Circuits that common circuitapproaches will not meet APD signal conditioning require-ments. More sophisticated techniques are MONITOR OUTPUT0mA TO 1mA = 0V TO 1V+ 35 VLT1789A = 1 BIAS OUTPUTTO APDVIN10V TO 33 VAN92 F02a1k1% Current MONITOR OUTPUT0mA TO 1mA = 0V TO 1V+ LT1789A = 1 BIAS OUTPUTTO APDVIN10V TO F02b1k1%10 MFigure 2. Instrumentation Amplifiers Extract Current Measurement from Modest Common Mode 2a Requires Separate Amplifier Power and Bias Supply Connections; Figure 2b Derives Both Connectionsfrom Single Point. Zener Level Shift Accomodates Amplifier Input Common Mode Range. Circuits CannotOperate from Single, Low Voltage Rail, Swing Close to Zero or Accomodate High Bias Voltages(2a)(2b)CURRENTMONITOR OUTPUT0mA TO 1mA = 0V TO 1V +5 VLT1789A = 100 BIAS OUTPUTTO APDVIN20V TO 90 VAN92 F031k1% 3.

6 Dividing Down High Common Mode VoltageIntroduces Huge Errors, Even with Precision 1% Accuracy Over 100nA to 1mA Current MonitorRange Is Buried by Resistor Mismatch, Even with Single Rail Powered Amplfier Cannot SwingClose Enough to Zero. Approach Is ImpracticalCarrier Based Current MonitorFigure 4 utilizes AC carrier modulation techniques to meetAPD Current monitor requirements. It features accu-racy over the sensed Current range, runs from a 5V supplyand has the high noise rejection characteristics of carrierbased lock in LTC1043 switch array is clocked by its internal oscil-lator. Oscillator frequency, set by the capacitor at Pin 16,is about 150Hz. S1 clocking biases Q1 via level shifter chops the DC Voltage across the 1k Current shunt,modulating it into a differential square wave signal whichApplication Note 92AN92-3feeds A1 through F AC coupling capacitors. A1 ssingle-ended output biases demodulator S2, which pre-sents a DC output to buffer amplifier A2.

7 A2 s output is thecircuit S3 clocks a negative output charge pump whichsupplies the amplifier s V pins, permitting output swingto (and below) zero volts. The 100k resistors at Q1minimize its on-resistance error contribution and preventdestructive potentials from reaching A1 (and the 5V rail) ifeither F capacitor fails. A2 s gain of corrects for theslight attenuation introduced by A1 s input resistors. Inpractice, it may be desirable to derive the APD bias voltageregulator s feedback signal from the indicated point, elimi-nating the 1k shunt resistor s Voltage Verifyingaccuracy involves loading the APD bias line with 100nA to1mA and noting output Coupled Current MonitorFigure 5 s DC coupled Current monitor eliminates theprevious circuit s trim but pulls more Current from theAPD bias supply. A1 floats, powered by the APD bias 15V zener diode and Current source Q2 ensure A1never is exposed to destructive voltages.

8 The 1k currentshunt s Voltage drop sets A1 s positive input potential. A1balances its inputs by feedback controlling its negativeinput via Q1. As such, Q1 s source Voltage equals A1 sOUTPUT0V TO 1V = 0mA TO 1mA5V+ 5VA1LT1789 FVOUT = 20V TO 90 VTO APDFOR OPTIONAL ZERO Current FEEDBACK TOAPD BIAS REGULATOR, SEE APPENDIX AAPDHIGH VOLTAGEBIAS INPUTAN92 F041k*1%100k* +5VA2LT1006 *Q11M*1M*Q2 MPSA425VS3S220k151617431852612131422 F22 F F5V20k*20k200k*1 F 1 F1 F100V 1 F100V #= 1N4148= METAL FILM RESISTOR= TECATE CMC100105MX1825= LTC1043 PIN NUMBER= TP0610L*1 F 100 VCIRCLED NUMBERS++Figure 4. Lock-In Amplifier Technique Permits 1% Accurate APD Current Measurement Over 100nA to1mA Range. APD Current Is AC Modulated by Q1, Single-Ended at A1 and Demodulated to DC by S2-A2 Note 1. See Appendix A, Low Error Feedback Signal DerivationTechniques, for 2. Appropriate high value load resistors, perhaps augmented witha monitoring Current meter, are available from Victoreen and othersuppliers.

9 Tight resistor tolerance, while convenient, is not strictlyrequired, as output target value is set by Current meter Note 92AN92-4positive input Voltage and its drain Current sets the voltageacross its source resistor. Q1 s drain Current produces avoltage drop across the ground referred 1k resistor iden-tical to the drop across the 1k Current shunt and, hence,APD Current . This relationship holds across the 20V to 90 VAPD bias Voltage range. The zener assures A1 sinputs are always within their common mode operatingrange and the 10M resistor maintains adequate zenercurrent when APD Current is at very low output options are shown. A2, a chopper stabilizedamplifier, provides an analog output. Its output is able toswing to (and below) zero because its V pin is suppliedwith a negative Voltage . This potential is generated byusing A2 s internal clock to activate a charge pump which,in turn, biases A2 s V second output option substitutes an A-to-D converter,providing a serial format digital output.

10 No V supply isrequired, as the LTC2400 A-to-D will convert inputs to(and slightly below) zero at strategic locations prevent destructive fail-ures. The 51k unit protects A1 if the APD bias line shortsto ground. The 10k resistor limits Current to a safe valueif Q1 fails and the 100k resistor serves a similar purposeif Q2 malfunctions. As in the previous figure, APD voltageregulator feedback may be taken at the Current shunt soutput to maintain optimal As stated, thiscircuit does not require trimming and maintains It does, however, pull Current approximatelyequalling the Current delivered to the APD, in addition toQ2 s collector Current . This can be an issue if the APD biassupply has restricted Current OUTPUT0V TO 1V = 0mA TO 1mA +A1LT1077 VOUT = 20V TO 90 VTO APDAPDHIGH VOLTAGEBIAS INPUTAN92 F051k* Current SHUNT1k* +A2 LTC1150 CLK OUTBUFFERED OUTPUT0mA TO 1mA = 0V TO 1V5VV HERE51k10k1k*1k*51KQ2 MPSA42Q22N390410 F10 FQ1 ZVP0545A100k39k1k5V1 F= BAT85= METAL FILM RESISTOR* OUTPUTOPTIONAL BUFFERED +++FOR OPTIONAL ZERO Current FEEDBACK TOAPD BIAS REGULATOR, SEE APPENDIX AFigure 5.


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