Spice model tutorial for Power MOSFETs

1 November 2013 Doc ID 023670 Rev 11/24UM1575 User manualSpice model tutorial for Power MOSFETsIntroductionThis document describes ST s Spice model versions available for Power MOSFETs . This is a guide designed to support user choosing the best model for his goals. In fact, it explains the features of different model versions both in terms of static and dynamic characteristics and simulation performance, in order to find the right compromise between the computation time and accuracy. For example, the self-heating model (V3 version), which accurately reproduces the thermal response of all electrical parameters, requires a considerable simulation , an example shows how the self-heating model models describe the characteristics of typical devices and don't guarantee the absolute representation of product specifications and operating characteristics; the datasheet is the only document providing product simulation is a very important tool to evaluate the device s performance, the exact device s behavior in all situations is not predictable, therefore the final laboratory test is model versionsUM15752/24 Doc ID 023670 Rev 11 Spice model versionsST provides 6 model versions on each part number: partnumber_V1C partnumber_V1T partnumber_V2 partnumber_V3 partnumber_V4 partnumber_TNV1C versionIt is the basic model (LEVEL =3) enclosing Coss and Crss modeling through capacitance profile tables.

2 It is an empirical model , and it assumes a 27 C constant versionIt comes directly from V1C version and it also includes the package thermal modeling through a thermal equivalent network and presents two additional external thermal nodes Tj and Tcase. This version hasn't the dynamic link between Power MOSFET temperature and internal versionIt is more advanced than V1C, in fact it takes into account the temperature dependence and capacitance profiles too. It allows the static and dynamic behavior to be reproduced by user at fixed temperatures. By using this version, the simulation of self-heating effects isn't versionIt comes directly from V2 version and includes the package thermal model through a thermal equivalent network and presents two additional external thermal nodes: Tj and Tcase. In this version, during each transient, the current Power dissipation is calculated and a current proportional to this Power is fed into the thermal network.

3 In this way, the voltage at Tj node contains all the information about the junction temperature, which changes internal device s parameters. Since it is a monitoring node, usually Tj pin is not connected (however, to avoid warning messages on this node, the user has to add a floating wire - see Figure 1). On contrary, Tcase node has to be connected, either to a constant voltage source Vdc representing the ambient temperature or to a heat sink modeled by its own thermal network (Figure 1).V4 versionIt comes directly from V3 version considering the device sited in free air. It includes the package thermal modeling through a thermal equivalent network and presents three additional external thermal nodes: Tj, Tcase and Tamb. The voltage at Tj node and Tcase node contains all the information about the junction temperature and case temperature which change internal device s parameters. Since they are monitoring nodes, usually Tj and Tcase pins are not connected (however, to avoid warning messages on this node, the user has to add a floating wire - see Figure 1).

4 Conversely, Tamb node has to be connected: to a constant voltage source Vdc, representing the ambient ID 023670 Rev 13/24UM1575 Spice model versions24TN versionIt includes the RC thermal network only, which represents the thermal model of the package. Its symbol has two pins: Tj and 1. Self-heating model (V3 version) Note:Tj is a monitoring node and it is not connected; Tcase is connected either by using a Vdc, representing the ambient temperature (on the left-side), or by heat-sink thermal network (on the right-side).C1R2R1Tc a s e D SGTJ Zth25Tc a s e D SGTJ Zth25C200Ta m bTa m bGIPD081020130954 FSRS pice model symbolUM15754/24 Doc ID 023670 Rev 12 Spice model symbolFor each model version, ST provides the appropriate symbol as shown below:Figure 2. model symbolsTJTcaseTc a s e D SGTJ ZthTa m bTJ1 TCASE2 Tcase D SGTJ ZthV1C versionV2 versionV1T versionV3 versionV4 versionTN versionGIPD081020131007 FSRDoc ID 023670 Rev 15/24UM1575 Spice models - instructions to simulate243 Spice models - instructions to simulateIn Spice simulator, user has to upload the device symbol (.)

5 OLB file) and the Spice model (.LIB file) to simulate transistors in the InstallationIn the package model , there are the following files: text file representing the model library written as a Spice code; symbol file to use the model into Orcad capture user interface. In Capture open the menu dialog window "Pspice" "Edit Simulation Profile". Go to "Configuration Files" tab and "Library" category. Select the library (*.lib) path by " " button and click to "Add to Design" (see Figure 3)Figure 3. Capture dialog window to select the library (*.lib)To include the symbol *.olb in the schematic view, open the menu dialog window "Place" "Part" (or simply pressing "P" key in keyboard) and click the "Add " button (or pressing Alt+"A") to select the file (see figure below).GIPD081020131721 FSRS pice models - instructions to simulateUM15756/24 Doc ID 023670 Rev 1 Figure 4. Capture dialog window to include the symbol (*.

6 Olb)Finally, you can simulate your circuit choosing the simulation type and Typical simulation parameters / optionsAs our models contain many non-linear elements, the standard simulation parameters are often not following values can facilitate convergence (set them in dialog window "Pspice" "Edit Simulation Profile" "Options" tab):Note:If the following error message appears during the simulation of one of device models:==> INTERNAL ERROR -- Overflow in <==you have to edit the ' ' file by inserting the following line behind the headline [PSPICE] as follows:[PSPICE]MathExceptions = NOT CHANGE ANY OTHER LINES ALREADY PRESENTGIPD081020131724 FSRABSTOL= 1nA(best accuracy of currents)CHGTOL= 1 pC(best accuracy of charges)ITL1= 150(DC and bias 'blind' iteration limit)ITL2= (DC and bias 'best guess' iteration limit)ITL4= (transient time point iteration limit)RELTOL= (relative accuracy of voltages and currents)Doc ID 023670 Rev 17/24UM1575A brief description of self-heating model (V3 version)244 A brief description of self-heating model (V3 version) Power MOSFET s Spice models are behavioral and achieved by fitting simulated data with static and dynamic characterization results.

7 The behavioral model is the best approach because it reproduces the electrical and thermal behavior of the Power device through a simplified physical description of the device consisting in a set of equations ruling its behavior at terminal level. The self-heating model (V3 version) includes different analog behavioral models (ABM) to describe resistors, voltage and current generator, which are temperature-dependent. A curve fit optimization algorithm extracts the mathematical expression for ABM, which yields a good representation of Power MOSFET s static and dynamic Figure 5, the self-heating Spice model (V3 version) schematic is shown. A brief description of self-heating model (V3 version)UM15758/24 Doc ID 023670 Rev 1 Figure 5. Power MOSFET self-heating model schematicRTj6V_sense30 VdcG_powerIN-OUT+OUT-IN+G_RsIN-OUT+OUT-I N+Rdd11 RTj14E22IN+IN-OUT+OUT-R_g31122G63G_RmosI N-OUT+OUT-IN+Rg6 Ecap (table)IN+IN-OUT+OUT-Rdd9E_E001IN+IN-OUT +OUT-Gcdg2IN-OUT+OUT-IN+Vread20 VdcGcdgIN-OUT+OUT-IN+12G_BVdssIN-OUT+OUT -IN+G59G_R_didIN-OUT+OUT-IN+RTj15E_E001I N+IN-OUT+OUT-E2IN+IN-OUT+OUT-Rdd10G60G_R _didIN-OUT+OUT-IN+RTj131122G_RmosIN-OUT+ OUT-IN+RTj16 Ecap2 (table)

8 IN+IN-OUT+OUT-0000 GateDrainSource0000Tj00Tc a s eCj6 Cref40d1xd1y50g3V2d1zd1ddssR_RmosR_dssxd d1bvdss1R_cgsRx1 CGSCref2402502V22alfa2 Rcap2R_GdiodeRdalfaRLsRcapLsLgR_GBDSS2g2 LdsR_edepRLd1d1kR_GpoweredepC_CdsCj5Cj4C j3aaR_R001baCj2R_R003 CCj1dd_dedepT1T2T3T4 GIPD081020131034 FSRCrss modelingCrss modelingDC modellingDC diode modelingCoss modelingCoss modellingBVdss modellingRecovery diode modellingThermal impedance modelingDoc ID 023670 Rev 19/24UM1575A brief description of self-heating model (V3 version) Thermal networkThermal impedance network represents the basic element, which is featured inside the macro- model . It is used to transform the Power dissipated inside the junction into a voltage representing the temperature (Tj). Figure 6. Physical structureThe voltage drop across the network is detected and used as emitter value inside behavioral equations used to model other impedance is the experimental data required to obtain the Cauer model (see Figure 6).

9 Figure 7. Thermal impedance profile and Cauer model *,3' )65*,3' )6557M *BSRZHU,1 287 287 ,1 57M 57M 57M 57M 7M7 FDVH&M 5B*SRZHU&M &M &M &M &M 7 7 7 7 ( ( ( ( ( ( ( ( .WLPH V 6 LPXODWLRQ([SHULPHQWDOA brief description of self-heating model (V3 version)UM157510/24 Doc ID 023670 Rev Experimental data used to fit the modelThe model implementation requires the following experimental data: Typ. output characteristics at different temperatures Typ. transfer characteristics at different temperatures Typ. drain source breakdown voltage at different temperatures Typ. drain source on state resistance vs temperature Typ. gate threshold voltage vs temperature Typ. forward diode characteristics Typ. capacitances profile vs VDS Typ. gate charge Typ. switching on resistive load Typ. switching on inductive load Typ. free-wheeling diode characteristics Unclamped inductive switching Switching losses vs gate resistance Equivalent capacitance time related (Co(tr)) Equivalent capacitance energy related (Co(er)) Max.)))))))]

10 Transient thermal impedance Figure 8. Simulated and measured output characteristicsFigure 9. Simulated curves at VGS = 10 V *,3' )65 ,' $ 9'6 9 VLPXODWHGPHDVXUHG*,3' )65 ,' $ 9'6 9 5'6RQ# &5'6RQ# &5'6RQ# &Doc ID 023670 Rev 111/24UM1575A brief description of self-heating model (V3 version) COSS and CRSS modelCharge and current formulas for a linear capacitor are: For a non linear (voltage-dependent) time-independent capacitor these formulas become:The C(V) function is obtained by lookup table. Figure 12. Capacitance profilesFigure 10. Normalized RDS(on) vs temperature Figure 11. Normalized gate threshold voltage vs temperature RDS(on) ( C)(norm) (th) ( C)(norm) AAM06483v1 QCV =it()CdVdt------- =QCV()Vd =it()CV()dVdt------- = (V)(pF)1100 CissCossCrssAM06481v1A brief description of self-heating model (V3 version)UM157512/24 Doc ID 023670 Rev Example of dynamic Gate chargeFigure 13.