Transcription of TMS320F2806x Piccolo™ Microcontrollers - TI.com
1 ProductFolderOrderNowTechnicalDocumentsT ools &SoftwareSupport &CommunityAn IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand ,TMS320F28068,TMS320F28067,TMS320F28066 TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062 SPRS698G NOVEMBER2010 REVISEDMAY2018 TMS320F2806xPiccolo Microcontrollers1 High-Efficiency32-BitCPU(TMS320C28x) 90 MHz( ) 16 16 and 32 32 Multiplyand Accumulate(MAC)Operations 16 16 DualMAC HarvardBus Architecture AtomicOperations FastInterruptResponseand Processing UnifiedMemoryProgrammingModel Code-Efficient(in C/C++and Assembly) Floating-PointUnit (FPU) NativeSingle-PrecisionFloating-PointOper ations ProgrammableControlLaw Accelerator(CLA) 32-BitFloating-PointMathAccelerator ExecutesCodeIndependentlyof the MainCPU Viterbi,ComplexMath,CRCUnit (VCU) ExtendsC28xInstructionSet to SupportComplexMultiply,ViterbiOperations ,and CyclicRedundencyCheck(CRC) EmbeddedMemory Up to 256 KBof Flash Up to 100 KBof RAM 2KB of One-TimeProgrammable(OTP)ROM 6-ChannelDirectMemoryAccess(DMA) Low Deviceand SystemCost No PowerSequencingRequirement IntegratedPower-onResetand BrownoutReset Low-PowerOperatingModes No AnalogSupportPin Endianness.
2 LittleEndian JTAGB oundaryScanSupport and BoundaryScanArchitecture Clocking Two InternalZero-PinOscillators On-ChipCrystalOscillator/ExternalClockIn put WatchdogTimerModule MissingClockDetectionCircuitry PeripheralInterruptExpansion(PIE)BlockTh atSupportsAll PeripheralInterrupts Three32-BitCPUT imers AdvancedControlPeripherals Up to 8 EnhancedPulse-WidthModulator(ePWM)Module s 16 PWMC hannelsTotal(8 HRPWM-Capable) Independent16-BitTimerin EachModule ThreeInputEnhancedCapture(eCAP)Modules Up to 4 High-ResolutionCapture(HRCAP)Modules Up to 2 EnhancedQuadratureEncoderPulse(eQEP)Modu les 12-BitAnalog-to-DigitalConverter(ADC),Du alSample-and-Hold(S/H) Up to Up to 16 Channels On-ChipTemperatureSensor 128-BitSecurityKey and Lock ProtectsSecureMemoryBlocks PreventsReverse-Engineeringof Firmware SerialPort Peripherals Two SerialCommunicationsInterface(SCI)[UART] Modules Two SerialPeripheralInterface(SPI)Modules One Inter-Integrated-Circuit(I2C)Bus One MultichannelBufferedSerialPort (McBSP)Bus One EnhancedControllerAreaNetwork(eCAN) UniversalSerialBus (USB) (seeDeviceComparisonTablefor Availability) Full-SpeedDeviceMode Full-Speedor Low-SpeedHostMode Up to 54 IndividuallyProgrammable,MultiplexedGene ral-PurposeInput/Output(GPIO)PinsWithInp utFiltering AdvancedEmulationFeatures Analysisand BreakpointFunctions Real-TimeDebugThroughHardware PackageOptions 80-PinPFPand 100-PinPZPP owerPAD ThermallyEnhancedThinQuadFlatpacks(HTQFP s) 80-PinPN and 100-PinPZ Low-ProfileQuadFlatpacks(LQFPs) TemperatureOptions T: 40 C to 105 C S: 40 C to 125 C Q: 40 C to 125 C (AECQ100 QualificationforAutomotiveApplications)2 TMS320F28069,TMS320F28068,TMS320F28067,T MS320F28066 TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062 SPRS698G NOVEMBER2010.
3 TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065 TMS320F28064 TMS320F28063 TMS320F28062 DeviceOverviewCopyright 2010 2018, Appliances BuildingAutomation ElectricVehicle/HybridElectricVehicle(EV /HEV)Powertrain FactoryAutomation Grid Infrastructure Medical,Healthcareand Fitness MotorDrives PowerDelivery TelecomInfrastructure Testand F2806xPiccolo familyof Microcontrollers (MCUs)providesthe powerof the C28xcoreand CLAcoupledwith highlyintegratedcontrolperipheralsin low code-compatiblewith previousC28x-basedcode,and also providesa high levelof internalvoltageregulatorallowsfor theHRPWM moduleto allowfor dual-edgecontrol(frequencymodulation).An alogcomparatorswith internal10-bitreferenceshavebeenaddedand can be routeddirectlyto controlthe ADCconvertsfrom0 to supportsratio- beenoptimizedfor low overheadand latency.(1)For moreinformationon thesedevices,see Mechanical,Packaging,and (1)PARTNUMBERPACKAGEBODYSIZETMS320F28069 PZPHTQFP(100) (80) (100) (80) BusDMA BusDMA Bus16-Bit Peripheral Bus32-Bit PeripheralBusMemory BusA7:0B7:0 Memory BusMemory BusDMA BusCLA BusDMA BusGPIO MuxAIO Mux32-Bit Peripheral BusADC0-waitResultRegsADCCOMP+DACCOMP1 OUTCOMP2 OUTCOMP3 OUTCOMP1 ACOMP2 ACOMP3 ACOMP1 BCOMP2 BCOMP3 BBoot-ROM(32K 16)(0-wait,Nonsecure) GPIOMuxGPIOMuxTRSTTCK, TDI, TMSTDOXCLKINLPM Wakeup3 Ext.
4 InterruptsX1X2 XRSM0 SARAM (1K 16)(0-wait, Nonsecure) M1 SARAM (1K 16)(0-wait, Nonsecure) L5 DPSARAM (8K 16)(0-wait, Nonsecure)DMA RAM0 L6 DPSARAM (8K 16)(0-wait, Nonsecure)DMA RAM1 L7 DPSARAM (8K 16)(0-wait, Nonsecure)DMA RAM2 L8 DPSARAM (8K 16)(0-wait, Nonsecure)DMA RAM3 L0 DPSARAM (2K 16)(0-wait, Secure)CLA Data RAM2 L1 DPSARAM (1K 16)(0-wait, Secure)CLA Data RAM0 L2 DPSARAM (1K 16)(0-wait, Secure)CLA Data RAM1 L3 DPSARAM (4K 16)(0-wait, Secure)CLA Program RAM L4 SARAM (8K 16)(0-wait, Secure) CodeSecurityModule(CSM)PSWDOTP 1K 16 Secure FLASH128K 168 equal sectorsSecure 64K 16 PUMPOTP/FlashWrapper32-Bit PeripheralBusUSB-0 GPIO MuxSCITXDxSCIRXDxSPISIMOxSPISOMIxSPICLKx SPISTExSDAxSCLxMFSRAMDRAMCLKRAMFSXAMDXAM CLKXAECAPxEQEPxAEQEPxBEQEPxIEQEPxSHRCAPx CANRXxCANTXxUSB0 DPUSB0 DMTZxEPWMxAEPWMxBEPWMSYNCIEPWMSYNCOSCI-A SCI-B(4L FIFO)SPI-ASPI-B(4L FIFO)I2C-A(4L FIFO)32-Bit Peripheral Bus(CLA accessible)ePWM1 to ePWM8 HRPWM (8ch)McBSP-A32-BitPeripheral Bus(CLA accessible)eCAP1eCAP2eCAP3eQEP1eQEP232-B it PeripheralBusHRCAP1 HRCAP2 HRCAP3 HRCAP4eCAN-A(32-mbox)CLA +MessageRAMsDMA6-chC28x 32-bit CPUFPUVCUOSC1, OSC2,Ext, PLLs,LPM, WD,CPU Timer 0,CPU Timer 1,CPU Timer 2,PIEC opyright 2017, Texas Instruments Incorporated3 TMS320F28069,TMS320F28068,TMS320F28067,T MS320F28066 TMS320F28065, TMS320F28064, TMS320F28063, NOVEMBER2010 REVISEDMAY2018 SubmitDocumentationFeedbackProductFolder Links.
5 TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065 TMS320F28064 TMS320F28063 TMS320F28062 DeviceOverviewCopyright 2010 2018, showsa functionalblockdiagramof the all peripheralpins are availableat the sametime due to FunctionalBlockDiagram10-BitDACA nalogComparatorsCMP1-OutCMP2-OutCMP3-Out Trip ZoneTempSensorADC(DMA-accessible) Core90-MHz Floating-Point(Accelerator)(DMA-accessib le)10-BitDAC10-BitDACA0A2A3A4A5A6A7B0B1B 2B3B4B5B6B7A16eQEP 2 HRCAP 4 eCAP 3 SystemVregInt-Osc-1 POR/BORInt-Osc-2On-chip OscWDPLLCLKSELT imers 32-bitTimer-0 Timer-1 Timer-2 GPIOC ontrolCOMMSX1X2 VREFLOVREFHIC28xCore(90-MHz)FPUVCUF lash MemoryRAMRAM(Dual-Access)eQEP8 HRCAP4eCAP348226 PWM-1 APWM-1 BPWM-2 APWM-2 BPWM-3 APWM-3 BPWM-4 APWM-4 BPWM-5 APWM-5 BPWM-6 APWM-6 BPWM-7 APWM-7 BPWM-8 APWM-8 BTZ1TZ2TZ3 CMP1-outCMP2-outCMP3-outPWM1(DMA-accessi ble)PWM5(DMA-accessible)PWM8(DMA-accessi ble)PWM7(DMA-accessible)PWM6(DMA-accessi ble)PWM4(DMA-accessible)PWM3(DMA-accessi ble)PWM2(DMA-accessible)UART 2 SPI 2 I2 CCANMcBSP(DMA-accessible)2 USB(DMA-accessible)4 TMS320F28069,TMS320F28068,TMS320F28067,T MS320F28066 TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062 SPRS698G NOVEMBER2010 :TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065 TMS320F28064 TMS320F28063 TMS320F28062 DeviceOverviewCopyright 2010 2018, PeripheralBlocks5 TMS320F28069,TMS320F28068,TMS320F28067,T MS320F28066 TMS320F28065, TMS320F28064, TMS320F28063, NOVEMBER2010 REVISEDMAY2018 SubmitDocumentationFeedbackProductFolder Links.
6 TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065 TMS320F28064 TMS320F28063 TMS320F28062 TableofContentsCopyright 2010 2018,TexasInstrumentsIncorporatedTableof Contents1 TerminalConfigurationand ,BOR, Applications,Implementation,and Designor Deviceand Mechanical,Packaging,and ,TMS320F28068,TMS320F28067,TMS320F28066 TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062 SPRS698G NOVEMBER2010 :TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065 TMS320F28064 TMS320F28063 TMS320F28062 RevisionHistoryCopyright 2010 2018,TexasInstrumentsIncorporated2 RevisionHistoryChangesfromMarch22, 2016to May18, 2018(fromF Revision(March2016)to G Revision)Page Global:RemovedTMDS28069 USB(F28069 PiccolocontrolSTICK)..1 (Features):Added"TemperatureOptions" (Applications) (RelatedProducts) (Pin Diagrams) (SignalDescriptions) Table4-1 (SignalDescriptions):UpdatedDESCRIPTIONo f XRSand Table4-1: Added"Reserved" mux positionsto (AbsoluteMaximumRatings):Updateddescript ionof "Inputclampcurrent".
7 23 (ESDR atings Commercial):Changedtitle from"ESDR atingsfor TMS320F2806xU" to "ESDR atings Commercial". (ESDR atings Automotive):Changedtitle from"ESDR atingsfor TMS320F2806x ,TMS320F2806xM,and TMS320F2806xF" to "ESDR atings Automotive". Table5-1 (TMS320F2806xCurrentConsumptionat 90-MHzSYSCLKOUT):Updated"To realizethe IDDnumbershownfor " (PowerSequencing):Added"(for analogpins,this valueis V aboveVDDA)" to "Thereis " Table5-14(FlashParametersat 90-MHzSYSCLKOUT):AddedMAXP rogramTimeof 2000ms for all Table5-14: AddedMAXE raseTimeof 15 s for all Table5-14: Table5-14: Addedfootnoteaboutparametersin Figure6-1 (28069 MemoryMap):Addedstartingaddressof CalibrationData(0x3D7E82)..54 Figure6-1: Updated0x3F8000 Figure6-1: Updatedfootnoteabout2806xMand Figure6-1: Figure6-2 (28068 MemoryMap):Addedstartingaddressof CalibrationData(0x3D7E82)..55 Figure6-2: Updated0x3F8000 Figure6-2: Updatedfootnoteabout2806xMand Figure6-2: Figure6-3 (28067 MemoryMap):Addedstartingaddressof CalibrationData(0x3D7E82).
8 56 Figure6-3: Updated0x3F8000 Figure6-4 (28066 MemoryMap):Addedstartingaddressof CalibrationData(0x3D7E82)..57 Figure6-4: Updated0x3F8000 Figure6-5 (28065 MemoryMap):Addedstartingaddressof CalibrationData(0x3D7E82)..58 Figure6-5: Updated0x3F8000 Figure6-6 (28064 MemoryMap):Addedstartingaddressof CalibrationData(0x3D7E82)..59 Figure6-6: Updated0x3F8000 Figure6-7 (28063 MemoryMap):Addedstartingaddressof CalibrationData(0x3D7E82)..60 Figure6-7: Updated0x3F8000 Figure6-8 (28062 MemoryMap):Addedstartingaddressof CalibrationData(0x3D7E82)..61 Figure6-8: Updated0x3F8000 Figure6-8: Updatedfootnoteabout2806xMand Figure6-8: (Usingthe On-chipVREG) (On-chipPower-OnReset(POR)and BrownoutReset(BOR)Circuit) Figure6-11(ClockTree) (Features):UpdatedNOTE aboutADCIN pins whichare multiplexedwith AIO (SerialPeripheralInterface(SPI)Module):U pdated"Risingedgewith phasedelay" (SPIM asterModeElectricalData/Timing) (SPIS laveModeElectricalData/Timing) Table6-55(I2C TimingRequirements) Table6-56(I2C SwitchingCharacteristics):Changedtableti tle from"I2C Timing" to "I2C SwitchingCharacteristics".
9 129 Table6-62(High-ResolutionPWMC haracteristics):UpdatedfootnoteaboutMEPs tep (High-ResolutionCaptureModules(HRCAP1to HRCAP4)):Updatedlist of HRCAP channel7 TMS320F28069,TMS320F28068,TMS320F28067,T MS320F28066 TMS320F28065, TMS320F28064, TMS320F28063, NOVEMBER2010 REVISEDMAY2018 SubmitDocumentationFeedbackProductFolder Links:TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065 TMS320F28064 TMS320F28063 TMS320F28062 RevisionHistoryCopyright 2010 2018,TexasInstrumentsIncorporatedindepen dentkey Figure6-52(HRCAPF unctionalBlockDiagram) Table6-72(GPIOAMUX):AddedfootnoteaboutUS Bfunctionalityof GPIO26and Table6-85(USBO utputPortsDP and DM SwitchingCharacteristics):Z(DRV):Changed MAXvaluefrom44 to 50 ..159 Section8 (Deviceand DocumentationSupport):Updatedand (Toolsand Software) (DocumentationSupport) (PackagingInformation) 2010 2018,TexasInstrumentsIncorporatedDeviceC omparisonSubmitDocumentationFeedbackProd uctFolderLinks:TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065 TMS320F28064 TMS320F28063 TMS320F280628 TMS320F28069,TMS320F28068,TMS320F28067,T MS320F28066 TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062 SPRS698G NOVEMBER2010 DeviceComparisonTable3-1 lists the featuresof the TMS320F2806xdevices.
10 (1)A type changerepresentsa majorfunctionalfeaturedifferencein a peripheraltype,theremay be minordifferencesbetweendevicesthat do not affectthebasicfunctionalityof the listedin theC2000 Real-TimeControlPeripheralsReferenceGuid eand in the peripheralreferenceguides.(2)USBis presenton TMS320F2806xU,TMS320F2806xM,and TMS320F2806xFdevices.(3)The Q temperatureoptionisnotavailableon the TMS320F2806xUdevices.(4)TMS320F2806xMdev icesare InstaSPIN-MOTION InstaSPIN-FOC moreinformation,see for a list DeviceComparisonFEATURETYPE(1)2806928069 U(2) (3)28069M(2) (4)28069F(2) (4)(90 MHz)2806828068U(2) (3)28068M(2) (4)28068F(2) (4)(90 MHz)2806728067U(2) (3)(90 MHz)2806628066U(2) (3)(90 MHz)2806528065U(2) (3)(90 MHz)2806428064U(2) (3)(90 MHz)2806328063U(2) (3)(90 MHz)2806228062U(2) (3)28062F(2) (4)(90 MHz)PackageType(PFPand PZPare and PZ are LQFPs.)100-PinPZPZP80-PinPNPFP100-PinPZP ZP80-PinPNPFP100-PinPZPZP80-PinPNPFP100- PinPZPZP80-PinPNPFP100-PinPZPZP80-PinPNP FP100-PinPZPZP80-PinPNPFP100-PinPZPZP80- PinPNPFP100-PinPZPZP80-PinPNPFPI nstructioncycle (FPU)YesYesYesYesYesYesYesYesVCUYesYesNo NoYesYesNoNoCLA0 YesNoNoNoYesNoNoNo6-ChannelDMA0 YesYesYesYesYesYesYesYesOn-chipFlash(16- bitword) 128K128K128K128K64K64K64K64 KOn-chipSARAM(16-bitword) 50K50K50K34K50K50K34K26 KCodesecurityfor on-chipFlash,SARAM,and OTPblocks YesYesYesYesYesYesYesYesBootROM(32K 16) YesYesYesYesYesYesYesYesOne-timeprogramm able(OTP)ROM(16-bitword)
