NTD2955, NVD2955 Power MOSFET - ON Semiconductor

1 Semiconductor Components Industries, LLC, 2017 May, 2019 Rev. 161 Publication Order Number: ntd2955 /DNTD2955, NVD2955 MOSFET Power ,P-Channel, DPAK-60 V, -12 AThis Power MOSFET is designed to withstand high energy in theavalanche and commutation modes. Designed for low voltage, high speed switching applications in Power supplies, converters, and powermotor controls. These devices are particularly well suited for bridgecircuits where diode speed and commutating safe operating areas arecritical and offer an additional safety margin against unexpectedvoltage Avalanche Energy Specified IDSS and VDS(on) Specified at Elevated Temperature Designed for Low Voltage, High Speed Switching Applications andto Withstand High Energy in the Avalanche and Commutation Modes NVD and SVD Prefix for Automotive and Other ApplicationsRequiring Unique Site and Control Change Requirements.

2 AEC Q101 Qualified and PPAP Capable These Devices are Pb Free and are RoHS CompliantMAXIMUM RATINGS (TJ = 25 C unless otherwise noted)RatingSymbolValueUnitDrain to Source VoltageVDSS 60 VdcGate to Source Voltage Continuous Non repetitive (tp 10 ms)VGSVGSM 20 25 VdcVpkDrain CurrentDr Continuous @ Ta = 25 CDr Single Pulse (tp 10 ms)IDIDM 12 18 AdcApkTotal Power Dissipation @ Ta = 25 CPD55 WOperating and Storage TemperatureRangeTJ, Tstg 55 to175 CSingle Pulse Drain to Source AvalancheEnergy Starting TJ = 25 C(VDD = 25 Vdc, VGS = 10 Vdc, PeakIL = 12 Apk, L = mH, RG = 25 W)EAS216mJThermal Resistance Junction to Case Junction to Ambient (Note 1) Junction to Ambient (Note 2) C/WMaximum Lead Temperature for SolderingPurposes, 1/8 in.

3 From case for10 secondsTL260 CStresses exceeding those listed in the Maximum Ratings table may damage thedevice. If any of these limits are exceeded, device functionality should not beassumed, damage may occur and reliability may be When surface mounted to an FR4 board using 1 in pad size (Cu area = in2).2. When surface mounted to an FR4 board using the minimum recommended pad size (Cu area = in2).DSGP 60 V155 mW @ 10 V, 6 ARDS(on) TYP 12 AID MAXV(BR)DSSA= Assembly Location*NT2955/NV2955= Specific Device Code (DPAK)NT2955= Specific Device Code (IPAK)Y= YearWW= Work WeekG= Pb Free Package1 Gate3 Source2 Drain4 DrainDPAKCASE 369 CSTYLE 21234 IPAKCASE 369 DSTYLE 21234 AYWWNT2955 GSee detailed ordering and shipping information on page 5 ofthis data INFORMATION1 Gate3 Source2 Drain4 DrainAYWWNT2955 GMARKING DIAGRAMS& PIN ASSIGNMENTS* The Assembly Location code (A) is front sideoptional.

4 In cases where the Assembly Location isstamped in the package, the front side assemblycode may be , CHARACTERISTICS (TJ = 25 C unless otherwise noted)CharacteristicSymbolMinTypMaxUnitO FF CHARACTERISTICSD rain to Source Breakdown Voltage (Note 3)(VGS = 0 Vdc, ID = mA)(Positive Temperature Coefficient)V(BR)DSS 60 67 VdcmV/ CZero Gate Voltage Drain Current(VGS = 0 Vdc, VDS = 60 Vdc, TJ = 25 C)(VGS = 0 Vdc, VDS = 60 Vdc, TJ = 150 C)IDSS 10 100mAdcGate Body Leakage Current (VGS = 20 Vdc, VDS = 0 Vdc)IGSS 100nAdcON CHARACTERISTICS (Note 3)Gate Threshold Voltage(VDS = VGS, ID = 250 mAdc)(Negative Temperature Coefficient)VGS(th) VdcmV/ CStatic Drain Source On State Resistance(VGS = 10 Vdc, ID = Adc)RDS(on) to Source On Voltage(VGS = 10 Vdc, ID = 12 Adc)(VGS = 10 Vdc, ID = Adc, TJ = 150 C)VDS(on) Transconductance (VDS = 10 Vdc, ID = Adc) MhosDYNAMIC CHARACTERISTICSI nput Capacitance(VDS = 25 Vdc, VGS = 0 Vdc,F = MHz)Ciss 500750pFOutput CapacitanceCoss 150250 Reverse Transfer CapacitanceCrss 50100 SWITCHING CHARACTERISTICS (Notes 3 and 4)

5 Turn On Delay Time(VDD = 30 Vdc, ID = 12 A,VGS = 10 V, RG = W)td(on) 1020nsRise Timetr 4585 Turn Off Delay Timetd(off) 2640 Fall Timetf 4890 Gate Charge(VDS = 48 Vdc, VGS = 10 Vdc, ID = 12 A)QT 1530nCQGS QGD DRAIN SOURCE DIODE CHARACTERISTICS (Note 3)Diode Forward On Voltage(IS = 12 Adc, VGS = 0 V)(IS = 12 Adc, VGS = 0 V, TJ = 150 C)VSD VdcReverse Recovery Time(IS = 12 A, dIS/dt = 100 A/ms ,VGS = 0 V)trr 50nsta 40 tb 10 Reverse Recovery Stored ChargeQRR mCProduct parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted.

6 Productperformance may not be indicated by the Electrical Characteristics if operated under different Indicates Pulse Test: Pulse Width 300 ms, Duty Cycle 2%.4. Switching characteristics are independent of operating junction , PERFORMANCE CURVES (TJ = 25 C unless otherwise noted)Figure 1. On Region CharacteristicsFigure 2. Transfer CharacteristicsFigure 3. On Resistance versus Drain Currentand TemperatureFigure 4. On Resistance versus Drain Currentand Gate VoltageFigure 5. On Resistance Variation with TemperatureFigure 6. Drain To Source LeakageCurrent versus Voltage01234501525 VDS, DRAIN TO SOURCE VOLTAGE (VOLTS)24 6 8100101824 VGS, GATE TO SOURCE VOLTAGE (VOLTS)TJ = 25 CVDS 10 VTJ = - 55 C25 C125 CVGS = -10 V-9 V-8 V-6 V-5 V-7 V5102035794122267891016603 ID, DRAIN CURRENT (AMPS)-ID, DRAIN CURRENT (AMPS)TJ = 25 CVGS = 10 VTJ = 125 C25 C- 55 = 10 V-15 , JUNCTION TEMPERATURE ( C) VDS, DRAIN TO SOURCE VOLTAGE (VOLTS)- 250255075100125150 VGS = 0 VVGS = 10 VID = 6 = 125 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A)RDS(on), DRAIN TO SOURCE RESISTANCE ( )RDS(on)

7 , DRAIN TO SOURCE RESISTANCE ( )RDS(on), DRAIN TO SOURCE RESISTANCE (NORMALIZED) IDSS, LEAKAGE (nA) ntd2955 , 7. Capacitance VariationFigure 8. Gate To Source and Drain To SourceVoltage versus Total ChargeFigure 9. Resistive Switching TimeVariation versus Gate ResistanceRG, GATE RESISTANCE (W)110100t, TIME (ns)VDD = 30 VID = 12 AVGS = 10 VTJ = 25 Ctftd(off)0QT, TOTAL GATE CHARGE (nC)2468ID = 12 ATJ = 25 (on) VSD, SOURCE TO DRAIN VOLTAGE (V)VGS = 0 VTJ = 25 TO SOURCE OR DRAIN TO SOURCE VOLTAGE (V)C, CAPACITANCE (pF)-VGS-VDSTJ = 25 CVDS = 0 VVGS = 0 V1000800600400200020 CissCossCrss55 CissCrss1200 Figure 10.

8 Diode Forward Voltage versus CurrentFigure 11. Maximum Rated Forward BiasedSafe Operating Area VDS, DRAIN TO SOURCE VOLTAGE (V)VGS = 15 VSINGLE PULSETC = 25 Cdc100 ms1 ms10 msRDS(on) LIMITTHERMAL LIMITPACKAGE LIMITF igure 12. Diode Reverse Recovery ISTIMEIStbID, DRAIN CURRENT (AMPS) VGS, GATE TO SOURCE VOLTAGE (V) IS, SOURCE CURRENT (AMPS) VDS, DRAIN TO SOURCE VOLTAGE (V) ntd2955 , 13. Thermal Responset, TIME (s)r(t), NORMALIZED EFFECTIVETRANSIENT THERMAL RESISTANCERqJC(t) = r(t) RqJCD CURVES APPLY FOR POWERPULSE TRAIN SHOWNREAD TIME AT t1TJ(pk) - TC = P(pk) RqJC(t)P(pk)t1t2 DUTY CYCLE, D = t1 = + + INFORMATIOND evicePackageShipping ntd2955 GDPAK(Pb Free)75 Units / RailNTD2955 1 GIPAK(Pb Free)75 Units / RailNTD2955T4 GDPAK(Pb Free)2500 / Tape & ReelNVD2955T4G*DPAK(Pb Free)2500 / Tape & ReelSVD2955T4G*DPAK(Pb Free)

9 2500 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel PackagingSpecifications Brochure, BRD8011/D.*NVD and SVD Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC Q101 Qualifiedand PPAP 1:1 STYLE 1:PIN 1. BASE2. COLLECTOR3. EMITTER4. COLLECTORSTYLE 2:PIN 1. GATE2. DRAIN3. SOURCE4. DRAINSTYLE 3:PIN 1. ANODE2. CATHODE3. ANODE4. CATHODESTYLE 4:PIN 1. CATHODE2. ANODE3. GATE4. ANODESTYLE 5:PIN 1.

10 GATE2. ANODE3. CATHODE4. ANODE1234 VSAK T SEATINGPLANERBFGD3 ( ) 6:PIN 1. MT12. MT23. GATE4. MT2 NOTES:1. DIMENSIONING AND TOLERANCING PERANSI , CONTROLLING DIMENSION: STYLE 7:PIN 1. GATE2. COLLECTOR3. EMITTER4. COLLECTOR xxxxxxxxx = Device CodeA= Assembly LocationlL= Wafer LotY= YearWW= Work WeekYWWxxxxxxxxxxxxxALYWWxDiscreteIntegr atedCircuitsIPAKCASE 369D 01 ISSUE CDATE 15 DEC 2010 MARKINGDIAGRAMSMECHANICAL CASE OUTLINEPACKAGE DIMENSIONSON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other Semiconductor reserves the right to make changes without further notice to any products herein.