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High Voltage, Isolated IGBT Gate Driver with …

High Voltage, Isolated IGBT gate Driver with Isolated flyback controller preliminary technical data adum4138 Rev. PrA Document Feedback Information furnished by analog devices is believed to be accurate and reliable. However, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of analog devices . Trademarks and registered trademarks are the property of their respective owners. One Technology Way, Box 9106, Norwood, MA 02062-9106, Tel: 2017 analog devices , Inc. All rights reserved. technical Support FEATURES 6 A peak drive output capability Output power device resistance: <1 Two overcurrent protection methods Desaturation detection Split emitter overcurrent detection Miller clamp output with gate sense input Isolated fault output Isolated temperature sensor readback Low propagation delay: 110 ns typical Minimum pulse width: 50 ns Operating junction temperature range ( 40 C to +150 C) Output and input UVLO Creepage distance: >6 mm Safety and regulatory approval

High Voltage, Isolated IGBT Gate Driver with Isolated Flyback Controller Preliminary Technical Data ADuM4138 Rev. PrA Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable.

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Transcription of High Voltage, Isolated IGBT Gate Driver with …

1 High Voltage, Isolated IGBT gate Driver with Isolated flyback controller preliminary technical data adum4138 Rev. PrA Document Feedback Information furnished by analog devices is believed to be accurate and reliable. However, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of analog devices . Trademarks and registered trademarks are the property of their respective owners. One Technology Way, Box 9106, Norwood, MA 02062-9106, Tel: 2017 analog devices , Inc. All rights reserved. technical Support FEATURES 6 A peak drive output capability Output power device resistance: <1 Two overcurrent protection methods Desaturation detection Split emitter overcurrent detection Miller clamp output with gate sense input Isolated fault output Isolated temperature sensor readback Low propagation delay: 110 ns typical Minimum pulse width: 50 ns Operating junction temperature range ( 40 C to +150 C) Output and input UVLO Creepage distance: >6 mm Safety and regulatory approvals 5000 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A DIN V VDE V 0884-10 (VDE V 0884-10).

2 2006-12 VIORM = 849 V peak (reinforced/basic) APPLICATIONS MOSFET/IGBT gate drivers Photovoltaic (PV) inverters Motor drives Power supplies GENERAL DESCRIPTION The adum4138 is a single-channel gate Driver specifically optimized for driving insulated gate bipolar transistors (IGBTs). analog devices , Inc., iCoupler technology provides isolation between the input signal and the output gate drive. The analog devices chip scale transformers also provide Isolated communication of control information between the high voltage and low voltage domains of the chip. Information on the status of the chip can be read back from dedicated outputs. The adum4138 includes an Isolated flyback controller to allow simple secondary voltage generation. Overcurrent detection is integrated onto the adum4138 to protect the IGBT in case of desaturation and/or overcurrent events.

3 The overcurrent detection is coupled with a high speed, two level, turn off in case of faults. The adum4138 provides a Miller clamp control signal for an external metal-oxide semiconductor field effect transistor (MOSFET) to provide robust IGBT turn off, with a single-rail supply when the Miller clamp voltage threshold drops below 2 V (typical) above GND2. Operation with unipolar secondary supplies is possible, with or without the Miller clamp operation. A low gate voltage detection circuit can trigger a fault if the gate voltage does not rise above an internal threshold within the time allowed from turn on. The low voltage detection circuit detects IGBT device failures that exhibit gate shorts or other weak drive causes. Two temperature sensor pins, TS1 and TS2, allow Isolated monitoring of system temperatures at the IGBTs. The secondary undervoltage lockout (UVLO) is set to V (typical) with common IGBT threshold levels in mind.

4 The adum4138 provides in field programming of temperature sensing diode gains and offsets by means of a serial peripheral interface (SPI) bus on the primary side of the device. Values are stored on an EEPROM located on the secondary side of the device. In additional, programming is available for specific voltage offsets, temperature sensing reporting frequencies, and important delays. The adum4138 provides Isolated fault reporting for overcurrent events, remote temperature overheating events, UVLO, thermal shutdown (TSD), and desaturation detection. adum4138 preliminary technical data Rev. PrA | Page 2 of 23 TABLE OF CONTENTS Features .. 1 Applications .. 1 General Description .. 1 Functional Block Diagram .. 3 Specifications .. 4 Electrical Characteristics .. 4 SPI Timing Specifications .. 7 Package Characteristics .. 7 Regulatory Information.

5 8 Insulation and Safety-Related Specifications .. 8 DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics .. 9 Recommended Operating Conditions .. 9 Absolute Maximum Ratings .. 10 ESD Caution .. 10 Pin Configuration and Function Descriptions .. 11 Applications Information .. 12 PCB Layout .. 12 Isolated flyback controller .. 12 SPI and EEPROM 12 USER Register .. 13 CONFIG Register .. 13 Control Register .. 15 Propagation Delay-Related Parameters .. 15 Protection Features .. 16 Power 20 Insulation Lifetime .. 20 DC Correctness and Magnetic Field Immunity .. 21 Typical Application Circuit .. 22 Outline Dimensions .. 23 preliminary technical data adum4138 Rev. PrA | Page 3 of 23 FUNCTIONAL BLOCK DIAGRAM adum4138 DECODEDECODEDECODEFLYBACKCONTROLLERLOGIC VDD2OC_DETDRIVEMILLER_THRESHFAULTVDD2V2 LEVOC_DETFAULTDRIVELOW_T_OPLOW_T_OPVMILL ERMILLER_THRESHVOC = 2V t = tdOCVOC_OFFVOT t = tdOTOT_ERROREEPROMSAWTOOTHIT1T2 VLOW_TEMPHYSTERESISLOW_T_OPVDD1 VDD29V t = tdDstDESAT_ERRORIDESATENCODEENCODEENCODE ENCODEENCODEUVLO1 FLYBACKCONTROLLERLOGICVDD2_REFFAIL LATCH= tALMUVLO2 TSDDESAT_ERROROC_ERROROT_ERRORVL_ERRORSP IINTERNALLDOREGULATORVDD1 GAIN1VT_OFFSET1 GAIN2VT_OFFSET2VT_OFFSET1 GAIN1VT_OFFSET2 GAIN2 TEMP_OUT_PWMTEMP_OUT_PWMVUVLO2 HYSTERESISDECODEDECODEVVLVL_ERRORUVLO1 VUVLO1 HYSTERESISVDD1 UVLO1 SCALINGBLOCKV5 INFIPGV5V5 t = tVDD1 HYSTERESISTSDINTERNALTEMPERATURESENSORIN TERNALLDOREGULATOR5 VVDD2 SWVI_SENSEII_SENSEISENSEGND1 VDD1V5_1VI+FAULTTEMP_OUTPGOODMOSIMISOCSS CLKGND1 GND2 DESATVOUT_ONVOUT_OFFV5_2

6 VOFF_SOFTGATE_SENSEMILLER_OUTOC1OC2TS1TS 2 GND2 FAULTDRIVEFAULTUVLO2 FAULTDRIVE16036-001 DRIVEFAULTOC_DETOC_ERRORDRIVEDVL14111012 13 Figure 1. adum4138 preliminary technical data Rev. PrA | Page 4 of 23 SPECIFICATIONS ELECTRICAL CHARACTERISTICS Low-side voltages referenced to GND1, and high-side voltages referenced to GND2. VDD1 = 12 V, VDD2 = 16 V, TJ = 40 C to +150 C, unless otherwise noted. All minimum/maximum specifications apply over the entire recommended junction operating temperature range, unless otherwise noted. All typical specifications are at TJ = 25 C, VDD1 = 12 V, a n d VDD2= 16 V, unless otherwise noted. Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments DC SPECIFICATIONS High-Side Power Supply Input Voltage VDD2 12 24 V Input Current, Quiescent VDD2 IDD2(Q) 15 20 mA TS1 = 2 V, TS2 = 2 V, VI+ = 0 V Isolated flyback Soft Start tSS 45 50 ms Output Voltage VFB VDD2 5% VDD2 VDD2 + 5% V All FLYBACK_V codes 16 V For FLYBACK_V code of Address 0111 flyback Operating Frequency fSW 180 200 220 kHz Maximum Duty Cycle DMAX 85 90 95 % On Time tMAX_ON s Switch NFET RDSON RDSON_SW_N SW current (ISW) = 150 mA Switch PFET RDSON RDSON_SW_P ISW = 150 mA Logic Supply VDD1 Input Voltage VDD1 25 V V5_1 Regulated Output Voltage V5_1 V No load VDD1 Input Current IDD1 4 7 mA TS1 = 2 V, TS2 = 2 V, VI+ = 0 V, TEMP_OUT and SW floating Logic Inputs (VI+, MOSI, SCLK, CS)

7 Input Current II A Input Voltage Logic High VIH V Logic Low VIL V Logic Input Hysteresis VHYST V Logic Output MISO NFET RDSON RDSON_MISO_N TBD MISO current (IMISO) = 20 mA MISO PFET RDSON RDSON_MISO_P TBD IMISO = 20 mA MISO NFET High-Z Leakage IMISO_LK_N TBD nA MISO = 0 V, VDD2 = 17 V MISO PFET High-Z Leakage IMISO_LK_P TBD nA MISO = 5 V, VDD2 = 17 V UVLO Positive Going Threshold VDD1 VVDD1UV+ V VDD2 VVDD2UV+ V Negative Going Threshold VDD1 VVDD1UV V VDD2 VVDD2UV V Hysteresis VDD1 VVDD1 UVH V VDD2 VVDD2 UVH V preliminary technical data adum4138 Rev. PrA | Page 5 of 23 Parameter Symbol Min Typ Max Unit Test Conditions/Comments PGOOD Threshold Rising VPGOOD_R VDD2 VDD2 VDD2 V Threshold Falling VPGOOD_F VDD2 VDD2 VDD2 V Pull-Down NFET Resistance RPGOOD_PD 10 Pull-Up Current Source IPG 60 80 160 A Filter Time Active tPGOOD_FILT1 24 TBD 46 s Cleared tPGOOD_FILT2 TBD s Hiccup Detect Time tHIC_DET 55 ms Off Time tHIC_OFF ms FA U LT Pull-Down NFET Resistance RNFLT_PD_FET 10 Pull-Up Current Source INF 60 80 100 A Hold Time tDALM ms Low gate Voltage Reference Voltage VVL 10 V Detect Delay Time tDVL s Fault Delay Time tD V L _ F LT 700 ns Overcurrent Voltage Temperature Disabled VOCD_TH 2 V T_RAMP_OP = 1 Temperature Enabled VOCD_TH_EN V T_RAMP_OP = 0.

8 TS1 = V V T_RAMP_OP = 0, TS1 = V V T_RAMP_OP = 0, TS1 = V Hysteresis Temperature Disabled VOCD_HYST V T_RAMP_OP = 1 Temperature Enabled VOCD_HYST_EN V T_RAMP_OP = 0, TS1 = V V T_RAMP_OP = 0, TS1 = V V T_RAMP_OP = 0, TS1 = V Detect Delay Time tdOC 760 800 840 ns OC_2 LEV_OP = 0, OC_TIME_OP = 0 Fault Delay Time tdOC_FLT 850 ns OC_2 LEV_OP=1 Detect Blanking tBLANK s LSB step size Desaturation (DESAT) Detect Comparator Threshold Rising VDESAT_R 9 V VDESAT_R Falling VDESAT_F 8 V Hysteresis VDESAT_H 1 V Internal Current Source IDESAT 500 A Fault Delay Time tD E S AT _ D E L AY 850 ns FA U LT Pin Blank Time tD E S AT _ B L A N K 370 ns FA U LT Pin Pull-Down Resistance tDESA_RDSON 14 adum4138 preliminary technical data Rev. PrA | Page 6 of 23 Parameter Symbol Min Typ Max Unit Test Conditions/Comments Thermal Shutdown Primary Side TSD Positive Edge tTSD_POS1 150 C Negative Edge tTSD_NEG1 135 C Secondary Side TSD Positive Edge ttsd_POS2 150 C Negative Edge tTSD_NEG2 135 C Isolated Temperature Sensor Temperature Sense Bias Current Source IT1 1 mA TS1 = V IT2 1 mA TS2 = V Temperature Sense Current Matching IT_MATCH TBD TBD TSx = V Pulse-Width Modulation (PWM)

9 Output Duty Cycle DPWM 5 95 % Frequency fPWM 10 kHz PWM_OSC = 0 50 kHz PWM_OSC = 1 PWM Duty-Cycle TSx = V 10 % PWM_OSC = 0 TSx = V 28 % PWM_OSC = 0 TSx = V 92 % PWM_OSC = 0 TSx = V 10 % PWM_OSC = 1 TSx = V 28 % PWM_OSC = 1 TSx = V 92 % PWM_OSC = 1 Overtemperature Detect Delay Time tDOT 1 ms Fault Delay Time tD O T _ F LT 760 ns Detection Voltage Rising VOT_0_R V TS1 pin voltage, OT_FAULT_SEL = 0 VOT_1_R V TS1 pin voltage, OT_FA U LT_SEL = 1 Falling VOT_0_F V TS1 pin voltage, OT_FA U LT_SEL = 0 VOT_1_F V TS1 pin voltage, OT_FA U LT_SEL = 1 Low Temperature Threshold Rising VLOW_T_R V TS1 pin voltage Falling VLOW_T_F V TS1 pin voltage TEMP_OUT Resistance Pull-Down RTEMP_N 10 TEMP_OUT current (ITEMP_OUT) = 20 mA Pull-Up RTEMP_P 10 ITEMP_OUT = 20 mA V5_2 Regulated Output Voltage V5_2 V Miller Clamp Voltage Threshold VMILLER 2 V Referenced to GND2 Internal NFET gate Resistance RDSON_N VOUT_OFF current (IVOUT_OFF = A, VDD1 = 6 V, VDD2 = 12 V gate Resistance 2 Level RDSON_N_2 LEV TBD IVOUT_OFF = A, VDD1 = 6 V, VDD2 = 12 V Internal PFET gate Resistance RDSON_P VOUT_ON current (IVOUT_ON) = A, VDD1 = 6 V, VDD2 = 12 V gate Resistance 2 Level RDSON_P_2 LEV TBD IVOUT_ON = A, VDD1 = 6 V, VDD2 = 12 V preliminary technical data adum4138 Rev.)

10 PrA | Page 7 of 23 Parameter Symbol Min Typ Max Unit Test Conditions/Comments Miller Pull-Down NFET RDSON_MILLER Miller current (IMILLER) = 50 mA VOFF_SOFT RDSON RDSON_SOFT_OFF 15 VOFF_SOFT current (IOFF_SOFT) = 15 mA Two Level Plateau Voltage V2 LEV 12 V CURRENT LIMIT Set Current II_SENSE 18 20 22 A Internal Current-Limit Reference VI_SENSE 450 500 550 mV Current-Limit Blanking Time tCL_BLANK 100 120 140 ns SWITCHING SPECIFICATIONS Pulse Width1 PW 50 ns Load capacitance (CL) = TBD n F, VDD2 = 12 V, RGON = RGOFF = 5 Deglitch VI+ tIN_IN, tIN_NIN 20 ns Propagation Delay2 tDHL, tDLH 110 ns No load Propagation Delay Skew3 tPSK 20 ns No load Output Rise/Fall Time (10% to 90%) tR/tF 800 ns CL = 100 nF, REXT = 1 Time to Report Overcurrent Fault to FA U LT Pin tREPORT TBD 300 ns 1 The minimum pulse width is the shortest pulse width at which the specified timing parameter is guaranteed.


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