LMG5200 80-V, 10-A GaN Half-Bridge Power Stage

1 SWPGNDHSLIGaN DriverVCCAGNDHOHBHILO89 VIN1 HILI45HS3HB2 VCC6 AGND7 LMG5200 ProductFolderOrderNowTechnicalDocumentsT ools &SoftwareSupport &CommunityReferenceDesignAn IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand MARCH2015 REVISEDMARCH2017 LMG520080-V, 10-A GaN half -BridgePowerStage11 Features1 Integrated15-m GaNFET sand Driver 80-VContinuous,100-VPulsedVoltageRating PackageOptimizedfor EasyPCBL ayout,EliminatingNeedfor Underfill,Creepage,andClearanceRequireme nts VeryLow CommonSourceInductanceto EnsureHighSlewRateSwitchingWithoutCausin gExcessiveRingingin Hard-SwitchedTopologies Idealfor Isolatedand Non-isolatedApplications GateDriverCapableof up to 10 MHzSwitching InternalBootstrapSupplyVoltageClampingto PreventGaNFET Overdrive SupplyRail UndervoltageLockoutProtection ExcellentPropagationDelay( Typical)andMatching(2 ns Typical) Low PowerConsumption2 Applications WideVINM ulti-MHzSynchronousBuckConverters ClassD Amplifiersfor Audio 48-VPoint-of-Load(POL)Convertersfor Telecom,Industrial,and EnterpriseComputing HighPowerDensitySingle-and Three-PhaseMotorDrive3 DescriptionThe LMG5200device,an 80-V, 10-Adriverplus GaNhalf-bridgepowerstage,providesan integratedpowerstagesolutionusingenhance ment-modeGalliumNitride(GaN) deviceconsistsoftwo 80-VGaNFET sdrivenby one high-frequencyGaNFET driverin a powerconversionas theyhavenearzeroreverserecoveryand very smallinputcapacitanceCISS.

2 All the devicesare mountedon a completelybond-wirefree LMG5200deviceis availablein a 6 mm 8 mm 2 mmlead-freepackageandcanbe easilymountedon TTL logiccompatibleinputscan withstandinputvoltagesup to 12 V regardlessof the proprietarybootstrapvoltageclampingtechn iqueensuresthe gatevoltagesof the enhancementmodeGaNFET sare withina safe discreteGaNFETsby offeringa isan idealsolutionfor applicationsrequiringhigh-frequency,high -efficiencyoperationin a TPS53632 Gcontroller,the LMG5200enablesdirectconversionfrom48-Vto point-of-loadvoltages( ).DeviceInformation(1)PARTNUMBERPACKAGEB ODYSIZE(NOM) LMG5200 QFM(9) (1) For all availablepackages,see the orderableaddendumatthe end of the MARCH2015 : LMG5200 SubmitDocumentationFeedbackCopyright 2015 2017,TexasInstrumentsIncorporatedTableof Contents1 Pin Configurationand 88 Applicationand Deviceand Mechanical,Packaging,and RevisionHistoryChangesfromRevisionC (December2016)to RevisionDPage generaleditorialglobalauthoringand (January2016)to RevisionCPage ChangedfromGaNTechnologyPreviewto AddedLinksin (March2015)to RevisionBPage Changedpart numbertypographicalerrorin Figure14.

3 16 ChangesfromOriginal(March2015)to RevisionAPage Correctedtypographicalerrorin Correctedtypographicalerrorin Correctedtypographicalerrorin Correctedtypographicalerrorin MARCH2015 REVISEDMARCH2017 ProductFolderLinks: LMG5200 SubmitDocumentationFeedbackCopyright 2015 2017,TexasInstrumentsIncorporated(1)I = Input,O = Output,G = Ground,P = Power5 Pin Configurationand FunctionsMOFP ackage9-PinQFMTop ViewPin FunctionsPINI/O(1) HS pin. Ensurelow capacitanceat this nodeon positivegatedrivesupplyVIN1 PInputvoltagepin. Electricallyconnectedto high-sideGaNFET MARCH2015 : LMG5200 SubmitDocumentationFeedbackCopyright 2015 2017,TexasInstrumentsIncorporated(1)Stre ssesbeyondthoselistedunderAbsoluteMaximu mRatingsmay causepermanentdamageto the stressratingsonly,whichdo not implyfunctionaloperationof the deviceat theseor any otherconditionsbeyondthoseindicatedunder RecommendedOperatingConditions. Exposureto absolute-maximum-ratedconditionsfor extendedperiodsmay affectdevicereliability.

4 (2)Devicecan withstand1000pulsesup to 100 V of 100-msdurationand less than1% duty cycleoverits (unlessotherwisenoted)(1)PARAMETERMINMAX UNITVIN to PGND080 VVIN to PGND(pulsed,100-msmaximumduration)(2)100 VHB to AGND to AGND 580 VHI to AGND to AGND AGND to HS to VCC080 VSW to PGND 580 VIOUT fromSW pin10 AJunctiontemperature,TJ 40125 CStoragetemperature,Tstg 40150 C(1)JEDEC documentJEP155statesthat 500-VHBM allowssafe manufacturingwith a standardESDcontrolprocess.(2)JEDEC documentJEP157statesthat 250-VCDM allowssafe manufacturingwith a (ESD)ElectrostaticdischargeHuman-bodymod el(HBM),per ANSI/ESDA/JEDECJS-001(1) 1000 VCharged-devicemodel(CDM),per JEDEC specificationJESD22-C101(2) 500V(1)This parameteris ensuredby testedin (unlessotherwisenoted) or HI Input012 VVIN080 VHS, SW 580 VHBVHS+ 4 VHS+ , SW slewrate(1)50V/nsJunctiontemperature,TJ 40125 MARCH2015 REVISEDMARCH2017 ProductFolderLinks: LMG5200 SubmitDocumentationFeedbackCopyright 2015 2017,TexasInstrumentsIncorporated(1)For moreinformationabouttraditionaland new thermalmetrics,see theSemiconductorandICPackageThermalMetri csapplicationreport.

5 (2)For thermalestimatesof this devicebasedon PCBcopperarea,see (1) (2) LMG5200 UNITMOF(QFM)9 PINSR JAJunction-to-ambientthermalresistance35 C/WR JC(top)Junction-to-case(top)thermalresis tance18 C/WR JBJunction-to-boardthermalresistance16 C/W C/W JBJunction-to-boardcharacterizationparam eter16 C/W(1)Parametersthat showonly a typicalvalueare ensuredby designand may not be testedin (unlessotherwisenoted)(1)PARAMETERTESTCO NDITIONSMINTYPMAXUNITSUPPLYCURRENTSICCVC C quiescentcurrentLI = HI = 0 V, VCC= 5 V, HB-HS= = 500 kHz35mAIHBHB quiescentcurrentLI = HI = 0 V, VCC= 5 V, HB-HS= operatingcurrentf = 500 kHz,50%Dutycycle,VDD= 5 (hyst)VCCUVLO thresholdhysteresis200mVVHBRHB (hyst)HB UVLO thresholdhysteresis200mVBOOTSTRAPDIODEVD LLow-currentforwardvoltageIVDD-HB= 100 100 100 100 mA, IR = 100 mA40nsQRRB ootstrapdiodereverserecoverychargeVVIN= 50 V2nC6 LMG5200 SNOSCY4D MARCH2015 : LMG5200 SubmitDocumentationFeedbackCopyright 2015 2017,TexasInstrumentsIncorporatedElectri calCharacteristics(continued)overoperati ngfree-airtemperaturerange(unlessotherwi senoted)(1)PARAMETERTESTCONDITIONSMINTYP MAXUNIT(2) (ON)HSHigh-sideGaNFET on-resistanceLI = 0 V, HI = VCC=5V, HB-HS= 5 V,VIN-SW= 10 A, TJ= 25 C1520m RDS(ON)LSLow-sideGaNFET on-resistanceLI = VCC= 5V, HI = 0 V, HB-HS= 5 V,SW-PGND= 10 A, TJ= 25 C1520m VSDGaN3rd quadrantconductiondropISD= 500 mA, VINfloating,VVCC= 5 V, HI= LI = 0 V2 VIL-VIN-SWLeakagefromVIN to SW whenthe high-sideGaNFET and low-side GaNFET are offVIN = 80 V, HI = LI = 0 V, VVCC= 5 V, TJ=25 C25150 AIL-SW-GNDL eakagefromSW to GNDwhenthe high-sideGaNFET and low-side GaNFET are offSW = 80 V, HI = LI = 0 V, VVCC= 5V, TJ=25 C25150 ACOSSO utputcapacitanceof high-sideGaNFET and low-sideGaNFETVDS=40 V, VGS= 0V (HI = LI = 0 V)

6 266pFQGT otalgatechargeVDS=40 V, ID= 10A,VGS= 5 V, ID= 10 A21nCQRRS ource-to-drainreverserecoverychargeNot includinginternaldriverbootstrapdiode0nC tHIPLHP ropagationdelay:HI rising(2)LI = 0 V, VCC= 5 V, HB-HS= 5 V, VIN =30 :HI falling(2)LI = 0 V, VCC= 5 V, HB-HS= 5 V, VIN =30 :LI rising(2)HI = 0 V, VCC= 5 V, HB-HS= 5 V, VIN =30 :LI falling(2)HI = 0 V, VCC= 5 V, HB-HS= 5 V, VIN =30 :LI high and HIlow(2)28nstMOFFD elaymatching:LI low and HIhigh(2)28nstPWMinimuminputpulsewidthth atchangesthe output10nsSource-to-Drain Voltage (V)Source-to-Drain Current (A) Temperature ( C)On-Resistance (m:)-40-25-105203550658095110125 1405791113151719212325D001 Frequency (kHz)VDD Current (mA) LoadOutput Current (A)Ambient Temperature ( C)01234562030405060708090D001400 LFM200 LFM100 LFMN atural MARCH2015 REVISEDMARCH2017 ProductFolderLinks: LMG5200 SubmitDocumentationFeedbackCopyright 2015 2017, the curvesare basedon measurementsmadeon a PCBdesignwith dimensionsof inches(W) inches(L) (T) and 4 layersof 2 oz safe operatingarea(SOA)curvesdisplaysthe temperatureboundarieswithinan operatingsystemby incorporatingthethermalresistanceand buckconverteris usedfor measuringthe outlinesthetemperatureand airflowconditionsrequiredfor a givenload areaunderthe curvedictatesthe SOAfor 5 VFigure1.

7 VDDS upplyCurrentvs SwitchingFrequencyVIN= 48 VVOUT= 5 VfSW= 1 MHzFigure2. Source-to-DrainCurrentvs GaNFET On-Resistancevs JunctionTemperatureSWPGND89 VIN1 HILI45HS3HB2 VCC6 AGND7 LMG5200 Pattern GeneratorVOUTD elay Measurement(A)8 LMG5200 SNOSCY4D MARCH2015 : LMG5200 SubmitDocumentationFeedbackCopyright 2015 2017,TexasInstrumentsIncorporated7 MismatchMeasurementFigure5 showsthe typicaltest setupusedto measurethe the gatedrivesare notaccessible,pullupand pulldownresistorsin this test circuitare usedto indicatewhenthe low-sideGaNFET turnsON and the high-sideGaNFET turnsOFFand viceversato measurethe tMONand this circuitfor the pullupand pulldownresistorsare in the orderof 1 k ; the currentsourcesusedare 2 throughFigure9 turnonpropagationdelaymeasurements,the currentsourcesare not turnofftimemeasurements,the currentsourcesare set to2 A, and a voltageclamplimit is also set, referredto as VIN(CLAMP). Whenmeasuringthe high-sidecomponentturnoffdelay,the currentsourceacrossthe high-sideFETis turnedon, the currentsourceacrossthe low-sideFET is off, HI transitionsfromhigh-to-low,and outputvoltagetransitionsfromVINto VIN(CLAMP).

8 Similarly,for low-side componentturnoffpropagationdelaymeasurem ents,the high-sidecomponentcurrentsourceis turnedoff,and the low-sidecomponentcurrentsourceis turnedon, LI transitionsfromhigh to low and the outputtransitionsfromGNDpotentialto VIN(CLAMP). The time betweenthe transitionof LI and the outputchangeis the PropagationDelayand PropagationMismatchMeasurementTimeVoltag e(V)GNDLI50%SW10%VIN(clamp)Voltage(V)VIN HI50%SW10%VIN(clamp)TimeVoltage(V)VINHI5 0%SW10%VIN2 TimeVoltage(V)GNDLI50%SW10% MARCH2015 REVISEDMARCH2017 ProductFolderLinks: LMG5200 SubmitDocumentationFeedbackCopyright 2015 2017,TexasInstrumentsIncorporatedPropaga tionDelayand MismatchMeasurement(continued)Figure6. High-SideGateDriverTurnonFigure7. High-SideGateDriverTurnoffFigure9. Low-SideGateDriverTurnoff8 showsthe LMG5200 , Half-Bridge ,GaNpowerstagewith highlyintegratedhigh-sideand low-sidegatedrivers,whichincludesbuilt-i nUVLO protectioncircuitryand an clampcircuitrylimitsthe bootstraprefreshoperationto ensurethat the high-sidegatedriveroverdrivedoesnot deviceintegratestwo,15-m GaNFETsin a devicecan be usedin manyisolatedand packageis designedto minimizetheloop inductancewhilekeepingthe drivestrengthsfor turnonand turnoffare optimizedtoensurehigh voltageslewrateswithoutcausingany excessiveringingon the gateor and ClampLevel ShifterHS310 LMG5200 SNOSCY4D MARCH2015.

9 LMG5200 SubmitDocumentationFeedbackCopyright 2015 2017, showsthe functionalblockdiagramof the LMG5200devicewith integratedhigh-sideand LMG5200devicebringseaseof designinghighpowerdensityboardswithoutth e needfor underfillwhilemaintainingcreepageand propagationdelaysbetweenthe high-sidegatedriverand low-sidegatedriverare matchedto allowvery tight controlof deadtime is criticalin GaN-basedapplicationsto maintainhigh and LI can be independentlycontrolledto minimizethethirdquadrantconductionof the low-sideFETfor verysmallpropagationmismatchbetweenthe HI and LI to the driversfor boththe fallingand risingthresholdsensuresdeadtimesof <10 ns. Co-packagingthe GaNFET half -bridgewith the minimizedinductancehas a significantperformanceimpacton high-sidegatedrivefromexceedingthe GaNFET smaximumgate-to-sourcevoltage(Vgs)withou tany anundervoltagelockout(UVLO)on the VDDand bootstrap(HB-HS) voltageis belowthe UVLO thresholdvoltage,the deviceignoresboththe HI and LI signalsto preventthe GaNFET sfrombeingpartiallyturnedon.

10 BelowUVLO,if thereis sufficientvoltage(VVCC> V), the driveractivelypullsthe high-sideandlow-sidegatedriveroutputlow. The UVLO thresholdhysteresisof 200 mV preventschatteringand unwantedturnondue to externalVCCbypasscapacitorwitha valueof F or size of 0402to minimizetracelengthto the pin. Placethe bypassand bootstrapcapacitorsascloseas possibleto the deviceto LMG5200 'sinputspins are independentlycontrolledwith TTL inputthresholdsand can withstandvoltagesup to 12V regardlessof the inputsto be directlyconnectedto the outputsof ananalogPWMcontrollerwith up to 12V powersupply,eliminatingthe needfor a orderto allowflexibilityto optimizedeadtimeaccordingto designneeds,the LMG5200doesnot bothHI and LI are asserted,boththe high-sideand low-sideGaNFET sareturnedon. Carefulconsiderationmustbe appliedto the controlinputsin orderto avoida MARCH2015 REVISEDMARCH2017 ProductFolderLinks: LMG5200 SubmitDocumentationFeedbackCopyright 2015 2017,TexasInstrumentsIncorporatedFeature Description(continued) UVLOThe LMG5200has an UVLOon boththe VCCand HB (bootstrap) VCCvoltageis belowthethresholdvoltageof V, boththe HI and LI inputsare ignored,to preventthe GaNFET sfrombeingpartiallyturnedon.