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Low drop fixed and adjustable positive voltage regulators

This is information on a product in full production. July 2013 DocID7194 Rev 261/24LD1117 ALow drop fixed and adjustable positive voltage regulatorsDatasheet - production dataFeatures Low dropout voltage : V typ. @ IOUT = 1 A, 25 C Very low quiescent current : 5 mA typ. @ 25 C Output current up to 1 A fixed output voltage of: V, V, V adjustable version availability (VREF = V) Internal current and thermal limit Only 10 F for stability Available in 2% (at 25 C) and 4% in full temperature range high supply voltage rejection: 80 dB typ. (at 25 C) Temperature range: 0 C to 125 CDescriptionThe LD1117A is a low drop voltage regulator able to provide up to 1 A of output current , available also in adjustable versions (VREF = V).

May 28, 2007 · • Internal current and thermal limit • Only 10 µF for stability • Available in ± 2% (at 25 °C) and 4% in full temperature range • High supply voltage rejection: – 80 dB typ. (at 25 °C) • Temperature range: 0 °C to 125 °C Description The LD1117A is a low drop voltage regulator able to provide up to 1 A of output current, available

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Transcription of Low drop fixed and adjustable positive voltage regulators

1 This is information on a product in full production. July 2013 DocID7194 Rev 261/24LD1117 ALow drop fixed and adjustable positive voltage regulatorsDatasheet - production dataFeatures Low dropout voltage : V typ. @ IOUT = 1 A, 25 C Very low quiescent current : 5 mA typ. @ 25 C Output current up to 1 A fixed output voltage of: V, V, V adjustable version availability (VREF = V) Internal current and thermal limit Only 10 F for stability Available in 2% (at 25 C) and 4% in full temperature range high supply voltage rejection: 80 dB typ. (at 25 C) Temperature range: 0 C to 125 CDescriptionThe LD1117A is a low drop voltage regulator able to provide up to 1 A of output current , available also in adjustable versions (VREF = V).

2 In fixed versions, the following output voltages are offered: V, V, and V. The device is supplied in: SOT-223, DPAK and TO-220. Surface mounted packages optimize the thermal characteristics while offering a relevant space saving advantage. high efficiency is assured by an NPN pass transistor. Only a very common 10 F minimum capacitor is needed for stability. Chip trimming allows the regulator to reach a very tight output voltage tolerance, within 2% at 25 1. Device summaryOrder codesOutput VLD1117 ASTRLD1117 ADT-TRAdjustable from Rev 26 Contents1 Diagram.

3 32 Pin configuration .. 43 Maximum ratings .. 54 Schematic application .. 65 Electrical characteristics .. 76 Typical application .. 107LD1117A adjustable : application note .. 128 Package mechanical data .. 139 Packaging mechanical data .. 1910 Revision history .. 23 DocID7194 Rev 263/24LD1117 ADiagram241 DiagramFigure 1. Block diagram Pin configurationLD1117A4/24 DocID7194 Rev 262 Pin configuration Note:The TAB is connected to the 2. Pin connections (top view) DPAKSOT-223TO-220 ADJ/GNDVOUT1 VIN23 ADJ/GNDVOUT1 VIN23 ADJ/GNDOUTPUTINPUTDocID7194 Rev 265/24LD1117 AMaximum ratings243 Maximum ratings Note:Absolute maximum ratings are those values beyond which damage to the device may occur.

4 Functional operation under these condition is not implied. Beyond the above suggested max. power dissipation, a short-circuit may permanently damage the 2. Absolute maximum ratingsSymbolParameterValueUnitVINDC input voltage15 VPDP ower dissipation12 WTSTGS torage temperature range-40 to +150 CTOPO perating junction temperature range0 to +125 CTable 3. Thermal dataSymbolParameterSOT-223 DPAKTO-220 UnitRthJCThermal resistance junction-case1585 C/WRthJAThermal resistance junction-ambient11010050 C/WSchematic applicationLD1117A6/24 DocID7194 Rev 264 Schematic applicationFigure 3.

5 Application circuit (for fixed output voltages) ADocID7194 Rev 267/24LD1117 AElectrical characteristics245 Electrical characteristicsRefer to the test circuits, TJ = 0 to 125 C, CO = 10 F, CI = 10 F, R = 120 between OUT-GND, unless otherwise specified. Refer to the test circuits, TJ = 0 to 125 C, CO = 10 F, CI = 10 F, unless otherwise specified. Table 4. Electrical characteristics of LD1117A#12 SymbolParameterTest voltageVI = V, IO = 10 mA, TJ = 25 voltageIO = 0 to 1 A, VI = to 10 VOLine regulationVI = to 8 V, IO = 0 mA16mV VOLoad regulationVI = V, IO = 0 to 1 A110mV VOTemperature VOLong term stability1000 hrs, TJ = 125 input voltageIO = 100 mA10 VIdQuiescent currentVI 8 V, IO = 0 mA510mAIOO utput currentVI - VO = 5 V, TJ = 25 C10001200mAeNOutput noise voltageB = 10 Hz to 10 kHz, TJ = 25 C100 VSVRS upply voltage rejectionIO = 40 mA, f = 120 HzVI - VO = 3 V.

6 Vripple = 1 VPP6080dBVDD ropout voltageIO = 100 = 500 = 1 VO(pwr)Thermal regulationTa = 25 C, 30 ms 5. Electrical characteristics of LD1117A#18 SymbolParameterTest voltageVI = V, IO = 10 mA, TJ = 25 voltageIO = 0 to 1 A, VI = to 8 VOLine regulationVI = to 8 V, IO = 0 mA16mV VOLoad regulationVI = V, IO = 0 to 1 A110mV VOTemperature VOLong term stability1000 hrs, TJ = 125 input voltageIO = 100 mA10 VIdQuiescent currentVI 8 V, IO = 0 mA510mAIOO utput currentVI - VO = 5 V, TJ = 25 C1000mAElectrical characteristicsLD1117A8/24 DocID7194 Rev 26 Refer to the test circuits, TJ = 0 to 125 C, CO = 10 F, CI = 10 F, unless otherwise specified.

7 Refer to the test circuits, TJ = 0 to 125 C, CO = 10 F, CI = 10 F, unless otherwise specified. eNOutput noise voltageB = 10 Hz to 10 kHz, TJ = 25 C100 VSVRS upply voltage rejectionIO = 40 mA, f = 120 HzVI - VO = 3 V, Vripple = 1 VPP6080dBVDD ropout voltageIO = 100 = 500 = 1 VO(pwr)Thermal regulationTa = 25 C, 30 ms 5. Electrical characteristics of LD1117A#18 (continued)SymbolParameterTest 6. Electrical characteristics of LD1117A#33 SymbolParameterTest voltageVI = V, IO = 10 mA, TJ = 25 voltageIO = 0 to 1 A, VI = to 10 VOLine regulationVI = to 8 V, IO = 0 mA16mV VOLoad regulationVI = V, IO = 0 to 1 A110mV VOTemperature VOLong term stability1000 hrs, TJ = 125 input voltageIO = 100 mA10 VIdQuiescent currentVI 10 V, IO = 0 mA510mAIOO utput currentVI - VO = 5 V, TJ = 25 C10001200mAeNOutput noise voltageB =10 Hz to 10 kHz, TJ = 25 C100 VSVRS upply voltage rejectionIO = 40 mA, f = 120 HzVI - VO = 3 V.

8 Vripple = 1 VPP6075dBVDD ropout voltageIO = 100 = 500 = 1 VO(pwr)Thermal regulationTa = 25 C, 30 ms 7. Electrical characteristics of LD1117A ( adjustable )SymbolParameterTest voltageVI = V, IO = 10 mA, TJ = 25 voltageIO = 10 mA to 1 A, VI = to 10 VOLine regulationVI = to 8 V, IO = 0 mA16mVDocID7194 Rev 269/24LD1117 AElectrical characteristics24 VOLoad regulationVI = V, IO = 0 to 1 A110mV VOTemperature VOLong term stability1000 hrs, TJ = 125 input voltageIO = 100 mA10 VIadjAdjustment pin currentVin 10 V60120 A IadjAdjustment pin current changeVin - VO = to 10 V, IO = 10 mA to 1 A15 AIO(min)

9 Minimum load currentVin = 10 V25mAIOO utput currentVI - VO = 5 V, TJ = 25 C10001200mAeNOutput noise voltageB =10 Hz to 10 kHz, TJ = 25 C100 VSVRS upply voltage rejectionIO = 40 mA, f = 120 HzVI - VO = 3 V, Vripple = 1 VPP6080dBVDD ropout voltageIO = 100 = 500 = 1 VO(pwr)Thermal regulationTa = 25 C, 30 ms 7. Electrical characteristics of LD1117A ( adjustable ) (continued)SymbolParameterTest applicationLD1117A10/24 DocID7194 Rev 266 Typical application Figure 4. Negative supply LD1117 AVOUT = - VOUT(NOM)Figure 5. Circuit for increasing output voltage LD1117 AVOUT = VOUT(NOM) + (0 - 5V)Figure 6.

10 voltage regulator with reference LD1117 AVOUT = VOUT(NOM) + VzVzDocID7194 Rev 2611/24LD1117 ATypical application24 Figure 7. Post-regulated dual supply LD1117 AVOUT2 = VOUT(NOM) ALD1117 AVOUT1 VOUT3 = -VOUT(NOM) ALD1117A adjustable : application noteLD1117A12/24 DocID7194 Rev 267 LD1117A adjustable : application noteThe LD1117A adjustable has a thermal stabilized V reference voltage between the OUT and ADJ pins. IADJ is 60 A typ. (120 A max.) and IADJ is 1 A typ. (5 A max.).R1 is normally fixed to 120 . From Figure 6 the following is obtained:VOUT = VREF + R2 (IADJ + IR1) = VREF + R2 (IADJ +VREF /R1) = VREF (1 + R2 / R1) + R2 x normal applications the R2 value is in the range of a few k , so the R2 x IADJ product can not be considered in the VOUT calculation; the above expression then becomes:VOUT = VREF (1 + R2 / R1).


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