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SA571 - ON Semiconductor

Semiconductor Components Industries, LLC, 2006 March, 2006 Rev. 41 Publication Order Number: SA571 /DSA571 CompandorThe SA571 is a versatile low cost dual gain control circuit in whicheither channel may be used as a dynamic range compressor orexpandor. Each channel has a full wave rectifier to detect the averagevalue of the signal, a linerarized temperature compensated variablegain cell, and an operational SA571 is well suited for use in cellular radio and radiocommunications systems, modems, telephone, and satellitebroadcast/receive audio Complete Compressor and Expandor in one IChip Temperature Compensated Greater than 110 dB Dynamic Range Operates Down to VDC System Levels Adjustable with External Components Distortion may be Trimmed Out Dynamic Noise Reduction Systems Voltage Controlled Amplifier Pb Free Packages are Available*Applications Cellular Radio High Level Limiter Low Level Expandor Noise Gate Dynamic Filters CD Player*For additional information on our Pb Free strategy and soldering details, pleasedownload the ON Semiconductor Soldering

SA571 http://onsemi.com 2 VARIABLE GAIN THD TRIM RECT CAP 1.8V INVERTER IN OUTPUT + − RECTIFIER Figure 1. Block Diagram DG IN RECT IN VREF R2 20k R1 10k R3 20k R4 ...

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Transcription of SA571 - ON Semiconductor

1 Semiconductor Components Industries, LLC, 2006 March, 2006 Rev. 41 Publication Order Number: SA571 /DSA571 CompandorThe SA571 is a versatile low cost dual gain control circuit in whicheither channel may be used as a dynamic range compressor orexpandor. Each channel has a full wave rectifier to detect the averagevalue of the signal, a linerarized temperature compensated variablegain cell, and an operational SA571 is well suited for use in cellular radio and radiocommunications systems, modems, telephone, and satellitebroadcast/receive audio Complete Compressor and Expandor in one IChip Temperature Compensated Greater than 110 dB Dynamic Range Operates Down to VDC System Levels Adjustable with External Components Distortion may be Trimmed Out Dynamic Noise Reduction Systems Voltage Controlled Amplifier Pb Free Packages are Available*Applications Cellular Radio High Level Limiter Low Level Expandor Noise Gate Dynamic Filters CD Player*For additional information on our Pb Free strategy and soldering details, pleasedownload the ON Semiconductor Soldering and Mounting TechniquesReference Manual, CAP 1 RECT IN 1DG CELL IN 1 GNDRECT CAP 2DG CELL IN 2 RECT IN 2 VCCD, and N Packages*12345678910111213141615 INV.

2 IN 1 RES. R3 1 OUTPUT 1 THD TRIM 1 INV. IN 2 RES. R3 2 OUTPUT 2 THD TRIM 2 TOP VIEW*SOL Released in Large SO Package CONNECTIONSSee detailed ordering and shipping information in the packagedimensions section on page 9 of this data INFORMATIONPDIP 16N SUFFIXCASE 64816116 SOIC 16 WBD SUFFIXCASE 751G1 MARKINGDIAGRAMS161SA571 DAWLYYWWG161SA571 NAWLYYWWGA= Assembly LocationWL= Wafer LotYY= YearWW= Work WeekG= Pb Free PackageSA571 TRIMRECT INOUTPUT+ RECTIFIERF igure 1. Block DiagramDG INRECT INVREFR2 20kWR1 10kWR3 20kWR4 30kWR3 MAXIMUM RATINGSR atingSymbolValueUnitMaximum Operating VoltageVCC18 VDCO perating Ambient Temperature RangeTA 40 to +85 COperating Junction TemperatureTJ150 CPower DissipationPD400mWThermal Resistance, Junction to AmbientN PackageD PackageRqJA75105 C/WStresses exceeding Maximum Ratings may damage the device.

3 Maximum Ratings are stress ratings only. Functional operation above theRecommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affectdevice CHARACTERISTICS (VCC = +15 V, TA = 25 C, unless otherwise noted)CharacteristicSymbolTest ConditionsMinTypMaxUnitSupply VoltageVCC 18 VSupply CurrentICCNo Signal Current CapabilityIOUT 20 mAOutput Slew RateSR .5 V/msGain Cell Distortion (Note 2)UntrimmedTrimmed Tolerance 5 15%Internal Reference Voltage DC Shift (Note 3)Untrimmed 90 150mVExpandor Output NoiseNo Signal, 15 Hz 20 kHz(Note 1) 2060mVUnity gain Level (Note 5) kHz + Change (Notes 2 and 4) dBReference Drift (Note 4) + , 25+20, 50mVResistor Drift (Note 4) 40 C to +85 C +10, 12 %Tracking Error (Measured Relative to Value at Unity gain )Equals [VO VO (unity gain )] dB V2dBmRectifier Input,VCC = + VV2 = + dBm, V1 = 0 dBV2 = 30 dBm, V1 = 0 dB + + , + Separation 60 dB1.

4 Input to V1 and V2 Measured at 0 dBm, Expandor AC input change from no signal to 0 Relative to value at TA = 25 0 dBm = 775 DescriptionThe SA571 compandor building blocks, as shown in theblock diagram, are a full wave rectifier, a variable gain cell,an operational amplifier and a bias system. The arrangementof these blocks in the IC result in a circuit which can performwell with few external components, yet can be adapted tomany diverse full wave rectifier rectifies the input current whichflows from the rectifier input, to an internal summing nodewhich is biased at VREF. The rectified current is averaged onan external filter capacitor tied to the CRECT terminal, andthe average value of the input current controls the gain of thevariable gain cell.

5 The gain will thus be proportional to theaverage value of the input signal for capacitively coupledvoltage inputs as shown in the following equation. Note thatfor capacitively coupled inputs there is no offset voltagecapable of producing a gain error. The only error will comefrom the bias current of the rectifier (supplied internally)which is less than |VIN*VREF|avgR1orGT|VIN|avgR1 The speed with which gain changes to follow changes ininput signal levels is determined by the rectifier filtercapacitor. A small capacitor will yield rapid response butwill not fully filter low frequency signals. Any ripple on thegain control signal will modulate the signal passing throughthe variable gain cell. In an expander or compressorapplication, this would lead to third harmonic distortion, sothere is a trade off to be made between fast attack and decaytimes and distortion.

6 For step changes in amplitude, thechange in gain with time is shown by this +10kW CRECTG(t)+(Ginitial*Gfinal)e*tt)GfinalTh e variable gain cell is a current in, current out devicewith the ratio IOUT/IIN controlled by the rectifier. IIN is thecurrent which flows from the DG input to an internalsumming node biased at VREF. The following equationapplies for capacitively coupled inputs. The output current,IOUT, is fed to the summing node of the op +VIN*VREFR2+VINR2A compensation scheme built into the DG cellcompensates for temperature and cancels out odd harmonicdistortion. The only distortion which remains is evenharmonics, and they exist only because of internal offsetvoltages. The THD trim terminal provides a means fornulling the internal offsets for low distortion operational amplifier (which is internallycompensated) has the non inverting input tied to VREF, andthe inverting input connected to the DG cell output as wellas brought out externally.

7 A resistor, R3, is brought out fromthe summing node and allows compressor or expander gainto be determined only by internal output stage is capable of 20 mA output allows a +13 dBm ( VRMS) output into a 300 W loadwhich, with a series resistor and proper transformer, canresult in +13 dBm with a 600 W output bandgap reference provides the reference voltage for allsumming nodes, a regulated supply voltage for the rectifierand DG cell, and a bias current for the DG cell. The lowtempco of this type of reference provides very stable biasingover a wide temperature typical performance characteristics illustrationshows the basic input output transfer curve for basiccompressor or expander circuits.+20+100 10 20 30 40 50 60 70 80 40 30 20 100+10 COMPRESSOR OUTPUT LEVELOREXPANDOR INPUT LEVEL (dBm)COMPRESSOR INPUT LEVEL OR EXPANDOR Figure 2.

8 Basic Input Output Transfer CurveOUTPUT LEVEL (dBm)133, 142, 1541, 16200pFFigure 3. Typical Test CircuitV1V2 VOVCC = , , 930kW20kW6, 117, 10 + SA571 interest has been expressed in high performanceelectronic gain control circuits. For non criticalapplications, an integrated circuit operationaltransconductance amplifier can be used, but whenhigh performance is required, one has to resort to complexdiscrete circuitry with many expensive, well matchedcomponents. This paper describes an inexpensive integratedcircuit, the SA571 Compandor, which offers a pair of highperformance gain control circuits featuring low distortion(< ), high signal to noise ratio (90 dB), and widedynamic range (110 dB).

9 Circuit BackgroundThe SA571 Compandor was originally designed to satisfythe requirements of the telephone system. When severaltelephone channels are multiplexed onto a common line, theresulting signal to noise ratio is poor and companding isused to allow a wider dynamic range to be passed throughthe channel. Figure 4 graphically shows what a compandorcan do for the signal to noise ratio of a restricted dynamicrange channel. The input level range of +20 to 80 dB isshown undergoing a 2 to 1 compression where a dBinput level change is compressed into a dB output levelchange by the compressor. The original 100 dB of dynamicrange is thus compressed to a 50 dB range for transmissionthrough a restricted dynamic range channel.

10 Acomplementary expansion on the receiving end restores theoriginal signal levels and reduces the channel noise by asmuch as 45 significant circuits in a compressor or expander arethe rectifier and the gain control element. The phone systemrequires a simple full wave averaging rectifier with goodaccuracy, since the rectifier accuracy determines the (input)output level tracking accuracy. The gain cell determines thedistortion and noise characteristics, and the phone systemspecifications here are very loose. These specs could havebeen met with a simple Operational TransconductanceMultiplier, or OTA, but the gain of an OTA is proportionalto temperature and this is very undesirable. Therefore, alinearized transconductance multiplier was designed whichis insensitive to temperature and offers low noise and lowdistortion performance.


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