PCA9306 - Dual Bidirectional I2C-Bus and SMBus …

1 Semiconductor Components Industries, LLC, 2014 July, 2014 Rev. 61 Publication Order Number: PCA9306 /DPCA9306 Dual Bidirectional I2C-busand SMBus voltage -LevelTranslatorThe PCA9306 is a dual Bidirectional I2C bus and SMBusvoltage level translator with an enable (EN) 2 bit Bidirectional translator for SDA and SCL Lines inMixed Mode I2C Bus Applications Standard Mode, Fast Mode, and Fast Mode Plus I2C Bus andSMBus Compatible Less Than ns Maximum Propagation Delay to AccommodateStandard Mode and Fast Mode I2C Bus Devices and MultipleMasters Allows voltage Level Translation Between.

2 V Vref(1) and V, V, V or 5 V Vbias(ref)(2) V Vref(1) and V, V, V or 5 V Vbias(ref)(2) V Vref(1) and V or 5 V Vbias(ref)(2) V Vref(1) and 5 V Vbias(ref)(2) V Vref(1) and 5 V Vbias(ref)(2) Provides Bidirectional voltage Translation With No Direction Pin Low W ON State Connection Between Input and Output PortsProvides Less Signal Distortion Open Drain I2C Bus I/O Ports (SCL1, SDA1, SCL2 and SDA2) 5 V Tolerant I2C Bus I/O Ports to Support Mixed Mode SignalOperation High Impedance SCL1, SDA1, SCL2 and SDA2 Pins for EN = LOW Lock Up Free Operation Flow Through Pinout for Ease of Printed Circuit Board TraceRouting Packages Offered: TSSOP 8, US8, UQFN8, UDFN8 ESD Performance: 4000 V Human Body Model, 400 V Machine Model NLV Prefix for Automotive and Other Applications RequiringUnique Site and Control Change Requirements.

3 AEC Q100 Qualified and PPAP Capable These are Pb Free detailed ordering and shipping information in the packagedimensions section on page 6 of this data INFORMATIONMARKINGDIAGRAMSTSSOP 8DT SUFFIXCASE 948 ALAAFYWW-AG1818AK MGGUS8US SUFFIXCASE 49318 UQFN8MU SUFFIXCASE 523 ANAQ MG1 AAF, AK, AQ, P = Specific Device CodeA= Assembly LocationY= YearWW= Work WeekM= Date CodeG= Pb Free x 517 BZP M1 PCA9306 DescriptionThe PCA9306 is a dual Bidirectional I2C bus and SMBusvoltage level translator with an enable (EN) input, and isoperational from V to V (Vref(1)) and V to V(Vbias(ref)(2)).

4 The PCA9306 allows Bidirectional voltage translationsbetween V and 5 V without the use of a direction pin. Thelow ON state resistance (Ron) of the switch allowsconnections to be made with minimal propagation EN is HIGH, the translator switch is on, and the SCL1and SDA1 I/O are connected to the SCL2 and SDA2 I/O,respectively, allowing Bidirectional data flow betweenports. When EN is LOW, the translator switch is off, and ahigh impedance state exists between PCA9306 is not a bus buffer that provides both leveltranslation and physical capacitance isolation to either sideof the bus when both sides are connected.

5 The PCA9306only isolates both sides when the device is disabled andprovides voltage level translation when PCA9306 can be used to run two buses, one at400 kHz operating frequency and the other at 100 kHzoperating frequency. If the two buses are operating atdifferent frequencies, the 100 kHz bus must be isolatedwhen the 400 kHz operation of the other bus is required. Ifthe master is running at 400 kHz, the maximum systemoperating frequency may be less than 400 kHz because ofthe delays added by the with the standard I2C bus system, pull up resistors arerequired to provide the logic HIGH levels on the translator sbus.

6 The PCA9306 has a standard open collectorconfiguration of the I2C bus. The size of these pull upresistors depends on the system, but each side of thetranslator must have a pull up resistor. The device isdesigned to work with Standard mode, Fast mode and Fastmode Plus I2C bus devices in addition to SMBus maximum frequency is dependent on the RC timeconstant, but generally supports > 2 the SDA1 or SDA2 port is LOW, the clamp is in theON state and a low resistance connection exists between theSDA1 and SDA2 ports.

7 Assuming the higher voltage is onthe SDA2 port, when the SDA2 port is HIGH, the voltage onthe SDA1 port is limited to the voltage set by VREF1. Whenthe SDA1 port is HIGH, the SDA2 port is pulled to the drainpull up supply voltage (Vpu(D)) by the pull up functionality allows a seamless translation betweenhigher and lower voltages selected by the user without theneed for directional control. The SCL1/SCL2 channel alsofunctions as the SDA1/SDA2 channels have the same electrical characteristics andthere is minimal deviation from one output to another involtage or propagation delay.

8 This is a benefit over discretetransistor voltage translation solutions, since the fabricationof the switch is symmetrical. The translator providesexcellent ESD protection to lower voltage devices, and at thesame time protects less ESD resistant DIAGRAMF igure 1. Logic DiagramPCA9306 ASSIGNMENTSF igure 2. TSSOP 8 / US8 PinoutsFigure 3. UQFN8 Pinout (Top Thru View)Figure 4. UDFN8 Pinout (Top Thru View)Table 1. PIN DESCRIPTIONPinDescriptionGNDG roundVREF1 Low voltage side reference supply voltage for SCL1 and SDA1 SCL1 Serial clock, low voltage side; connect to VREF1 through a pull up resistorSDA1 Serial data, low voltage side; connect to VREF1 through a pull up resistorSDA2 Serial data, high voltage side; connect to VREF2 through a pull up resistorSCL2 Serial clock, high voltage side; connect to VREF2 through a pull up resistorVREF2 High voltage side reference supply voltage for SCL2 and SDA2 ENSwitch enable input.

9 Connect to VREF2 and pull up through a high resistorTable 2. FUNCTION TABLEI nput EN (Note 1)FunctionLowDisconnectHighSCL1 = SCL2; SDA1 = SDA21. EN is controlled by the Vbias(ref)(2) logic levels and should be at least 1 V higher than Vref(1) for best translator 3. MAXIMUM RATINGSS ymbolParameterValueUnitVref(1)Reference voltage (Note 2) to + (ref)(2)Reference Bias voltage (Note 3) to + voltage to + / Output Pin voltage to + Channel Current128mAIIKDC Input Diode Current VIN < GND 50mATSTGS torage Temperature Range 65 to +150 CTLLead Temperature, 1 mm from Case for 10 SecondsTL = 260 CTJJ unction Temperature Under BiasTJ = 150 CqJAThermal Resistance (Note 2)

10 QJA = 150 C/WPDP ower Dissipation in Still Air at 85 CPD = 833mWMSLM oisture SensitivityLevel 1 FRFlammability Rating Oxygen Index: 28 to 34UL 94 V 0 @ inVESDESD Withstand voltage Human Body Mode (Note 3)Machine Model (Note 4)Charged Device Model (Note 5)> 4000> 400N/AVILATCHUPL atchup Performance Above VCC and Below GND at 125 C (Note 6) 100mAStresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionalityshould not be assumed, damage may occur and reliability may be Measured with minimum pad spacing on an FR4 board, using 10 mm by 1 inch, 2 ounce copper trace no air Tested to EIA / JESD22 A114 Tested to EIA / JESD22 A115 Tested to JESD22 C101 Tested to EIA / 4.