AX5042 - Advanced Multi-channel Single Chip UHF …

1 Semiconductor Components Industries, LLC, 2016 April, 2016 Rev. 41 Publication Order Number: AX5042 /DAX5042 Advanced multi -channelSingle chip UHF TransceiverOVERVIEWThe AX5042 is a true Single chip low power CMOS transceiverprimarily for use in SRD bands. The on chip transceiver consists of afully integrated RF front end with modulator and demodulator. Baseband data processing is implemented in an Advanced and flexiblecommunication controller that enables user friendly communicationvia the SPI interface or in direct wire Advanced multi channel Single chip UHF transceiver Configurable for Usage in 400 470 (510) MHz and 800 940 (1020) MHz ISM Bands Wide Variety of Shaped Modulations Supported in RX and TX(ASK, PSK, OQPSK, MSK, FSK, GFSK) Data Rates from 1 to 250 kbps (FSK, MSK, GFSK, GMSK, OQPSK) and 2 to 600 kbps (ASK, PSK)

2 With Fully ScalingNarrow band channel Filtering kHz to 600 kHz Programmable channel Filter Ultra Fast Settling RF Frequency Synthesizer for Low powerConsumption Compatible RS 232 (UART) Compatible RF Carrier Frequency and FSK DeviationProgrammable in 1 Hz Steps Fully Integrated Frequency Synthesizer with VCOAuto ranging and Band width Boost Modes for FastLocking Few External Components On chip Communication Controller and FlexibleDigital Modem channel Hopping up to 2000 hops/s Sensitivity down to 123 dBm @ kbps FSK Sensitivity down to 115 dBm @ 10 kbps FSK Up to +10 dBm (+13 dBm 433 MHz)

3 ProgrammableTransmitter power Amplifier for Long RangeOperation Crystal Oscillator with ProgrammableTransconductance for Low Cost Crystals (a TCXO isrecommended for channel Filter BW < 40 kHz) Automatic Frequency Control (AFC) SPI Micro controller Interface Digital RSSI with dB Resolution Fully Integrated Current/Voltage References Wire and Frame Mode QFN28 Package Low power 17 23 mA at V Supply duringReceive and 13 37 mA during Transmit 24 Bit RX/TX FIFO V to V Supply Range Programmable Cyclic Redundancy Check(CRC CCITT, CRC 16, CRC 32) Optional Spectral Shaping Using a Self SynchronizedShift Register RoHS CompliantApplications400 470 MHz and 800 940 MHz data transmission andreception in the Short Range Device (SRD) band.

4 Thefrequency range up to 510 MHz and 1020 MHz is accessiblewith higher VDD limit. Automatic Meter Reading FCC Part kHz, kHz and 25 kHzApplications EN 300 220 V European Paging Applications Long Range Sensor Read out Long Range Remote INFORMATIOND eviceTypeQtyAX5042 1 TA05 Tape & Reel500AX5042 1 TW30 Tape & Reel3,000 QFN28 5x5, DIAGRAMF igure 1. Functional Block Diagram of the AX50424 ANTP5 ANTNIF Filter &AGC FrequencyGenerationSubsystemFXTALC ommunication Controller &Serial InterfaceForward errorcorrectionDividerADCD igital IFchannelfilterPADe modulatorEncoderFramingFIFOM odulatorMixer13 SYSCLK27 CLK16P28 chip configuration12 RESET_N23 PWRUP19 IRQ_TXEN161514 SELCLKMISO17 MOSI21 DCLK18 DATAAX5042 RSSI16 1.

5 PIN FUNCTION DESCRIPTIONSS ymbolPin(s)TypeDescriptionNC1 NNot to be connectedVDD2 PPower supplyGND3 GGroundANTP4 AAntenna input/outputANTN5 AAntenna input/outputGND6 PGroundVDD7 PPower supplyNC8 NNot to be connectedLPFILT9 APin for optional external synthesizer loop filter; leave unconnected if not usedIt is recommended to use the internal loop filterNC10 NNot to be connectedGND11 PGroundRESET_N12 IOptional reset input. If not used this pin must be connected to functionality: Crystal oscillator (or divided) clock outputCan be programmed to be used as a general purpose I/O pinSEL14 ISerial peripheral interface selectCLK15 ISerial peripheral interface clockMISO16 OSerial peripheral interface data outputMOSI17 ISerial peripheral interface data inputDATA18I/OIn wire mode: Data input/outputCan be programmed to be used as a general purpose I/O pinIRQ_TXEN19I/OIn frame mode: Interrupt request outputIn wire mode.

6 Transmit enable inputCan be programmed to be used as a general purpose I/O pinVDD20 PPower supplyDCLK21I/OIn wire mode: Clock outputCan be programmed to be used as a general purpose I/O pinGND22 PGroundPWRUP23I/OPower up/ down input; activates/deactivates analog blocksCan be programmed to be used as a general purpose I/O pinIf the power up/ down functionality is handled in software and no usage asgeneral purpose I/O pin is planned then this pin should be tied to VDDNC24 NNot to be connectedNC25 NNot to be connectedVDD26 PPower supplyCLK16P27 ACrystal oscillator input/outputCLK16N28 ACrystal oscillator input/outputA = analog signalI = digital input signalO = digital output signalI/O = digital input/output signalN = not to be connectedP = power or groundAll digital inputs are Schmitt trigger inputs.

7 Digital inputand output levels are LVCMOS/LVTTL compatible V / 5 V center pad of the QFN28 package should beconnected to DrawingFigure 2. Pinout Drawing (Top View) 2. ABSOLUTE MAXIMUM RATINGSS ymbolDescriptionConditionMinMaxUnitsVDDS upply voltage current50mAPtotTotal power consumption800mWPIA bsolute maximum input power at receiver input15dBmII1DC current into any pin except ANTP, ANTN 1010mAII2DC current into pins ANTP, ANTN 100100mAIOO utput current40mAViaInput voltage ANTP, ANTN pins + VVInput voltage digital pins + 3 VVVesElectrostatic handlingHBM 20002000 VTambOperating ambient temperature 4085 CTstgStorage temperature 65150 CTjJunction temperature150 CStresses exceeding those listed in the Maximum Ratings table may damage the device.

8 If any of these limits are exceeded, device functionalityshould not be assumed, damage may occur and reliability may be Exposure to absolute maximum rating conditions for extended periods may affect device CharacteristicsTable 3. SUPPLIESS ymbolDescriptionConditionMinTypMaxUnitsT AMBO perational ambient temperature 402785 CVDDP ower supply down consumption RX868 MHz; bit rate 10 kBit/s21mA868 MHz; bit rate 10 kBit/slow power mode, (Note 1)17868 MHz; bit rate 600 kBit/s23868 MHz; bit rate 600 kBit/slow power mode, (Note 1)19433 MHz; bit rate 10 kBit/s21433 MHz; bit rate 10 kBit/slow power mode, (Note 1)17433 MHz; bit rate 600 kBit/s23433 MHz.

9 Bit rate 600 kBit/slow power mode, (Note 1)19 ITXC urrent consumption TX868 MHz, 10 dBm36mA868 MHz, 4 dBm23868 MHz, 0 dBm19868 MHz, 12 dBm13433 MHz, 12 dBm37433 MHz, 6 dBm24433 MHz, 2 dBm20433 MHz, 8 dBm131. Low power mode requires reprogramming of the device reference current (REF_I) as well as the synthesizer VCO current (VCO_I) and thereare trade offs with the lowest achievable power supply value as well as with sensitivity. Sensitivities and operating conditions in thisdata sheet do not refer to low power 4. LOGICS ymbolDescriptionConditionMinTypMaxUnitsD igital InputsVT+Schmitt trigger low to high threshold Schmitt trigger high to low threshold voltage, voltage, high2 VILI nput leakage current 1010mADigital OutputsIOHO utput Current, highVOH = V4mAIOLO utput Current, lowVOL = V4mAIOZTri state output leakage current CharacteristicsTable 5.

10 CRYSTAL OSCILLATORS ymbolDescriptionConditionMinTypMaxUnitsf oscCrystal frequency(Note 1)16 MHzgmoscTransconductance oscillatorXTALOSCGM = 00001mSXTALOSCGM = 00012 XTALOSCGM = 0010 default3 XTALOSCGM = 00114 XTALOSCGM = 01005 XTALOSCGM = 01016 XTALOSCGM = = 01117 XTALOSCGM = = 10018 XTALOSCGM = = 10119 XTALOSCGM = = 110110 XTALOSCGM = = 111111fextExternal clock input(Note 2)16 MHzRINoscInput impedance10kWCINoscInput capacitance4pF1. Tolerances and start up times will depend on the crystal used. Depending on the RF frequency and channel spacing the IC must be calibratedto the exact crystal frequency using the readings of the register TRKFREQ2.