MC1496, MC1496B Balanced Modulators/ Demodulators

1 Semiconductor Components Industries, LLC, 2006 October, 2006 Rev. 101 Publication Order Number:MC1496/DMC1496, MC1496 BBalanced Modulators/ DemodulatorsThese devices were designed for use where the output voltage is aproduct of an input voltage (signal) and a switching function (carrier).Typical applications include suppressed carrier and amplitudemodulation, synchronous detection, FM detection, phase detection,and chopper applications. See ON Semiconductor Application NoteAN531 for additional design Excellent Carrier Suppression 65 dB typ @ MHz 50 dB typ @ 10 MHz Adjustable Gain and Signal Handling Balanced Inputs and Outputs High Common Mode Rejection 85 dB Typical This Device Contains 8 Active Transistors Pb Free Package is Available* 14D SUFFIXCASE 751A141141 PDIP 14P SUFFIXCASE 646 PIN CONNECTIONSS ignal Input123456710111413129N/COutputBiasSign al InputGain AdjustGain AdjustInput Carrier8 VEEN/COutputN/CCarrier InputN/CSee detailed ordering and shipping information in the packagedimensions section on page 12 of this data INFORMATIONSee general marking information in the device markingsection on page 12 of this data MARKING INFORMATIONMC1496, MC1496 = 500 kHz.

2 IS = kHzIC = 500 kHzIS = kHz6040200 Log Scale Id499 kHz500 kHz501 kHzIC = 500 kHzIS = kHzIC = 500 kHzIS = kHz499 kHz500 kHz501 kHzLinear 1. Suppressed Carrier OutputWaveformFigure 2. Suppressed Carrier SpectrumFigure 3. Amplitude ModulationOutput WaveformFigure 4. Amplitude Modulation SpectrumMAXIMUM RATINGS (TA = 25 C, unless otherwise noted.)RatingSymbolValueUnitApplied Voltage(V6 V8, V10 V1, V12 V8, V12 V10, V8 V4, V8 V1, V10 V4, V6 V10, V2 V5, V3 V5) V30 VdcDifferential Input SignalV8 V10V4 V1+ (5 + I5Re)VdcMaximum Bias CurrentI510mAThermal Resistance, Junction to AirPlastic Dual In Line PackageR JA100 C/WOperating Ambient Temperature RangeMC1496MC1496 BTA0 to +70 40 to +125 CStorage Temperature RangeTstg 65 to +150 CElectrostatic Discharge Sensitivity (ESD)Human Body Model (HBM)Machine Model (MM)ESD2000400 VStresses exceeding Maximum Ratings may damage the device.

3 Maximum Ratings are stress ratings only. Functional operation above theRecommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affectdevice , MC1496 CHARACTERISTICS (VCC = 12 Vdc, VEE = Vdc, I5 = mAdc, RL = k , Re = k , TA = Tlow to Thigh,all input and output characteristics are single ended, unless otherwise noted.) (Note 1) FeedthroughVC = 60 mVrms sine wave andoffset adjusted to zeroVC = 300 mVpp square wave:offset adjusted to zerooffset not adjustedfC = kHzfC = 10 MHzfC = kHzfC = kHz51 VCFT VrmsmVrmsCarrier SuppressionfS = 10 kHz, 300 mVrmsfC = 500 kHz, 60 mVrms sine wavefC = 10 MHz, 60 mVrms sine wave52 VCS40 6550 dBkTransadmittance Bandwidth (Magnitude) (RL = 50 )Carrier Input Port, VC = 60 mVrms sine wavefS = kHz, 300 mVrms sine waveSignal Input Port, VS = 300 mVrms sine wave|VC| = Vdc88BW3dB 30080 MHzSignal Gain (VS = 100 mVrms, f = kHz; | VC|= Vdc) V/VSingle Ended Input Impedance, Signal Port, f = MHzParallel Input ResistanceParallel Input Capacitance6 ripcip k pFSingle Ended Output Impedance, f = 10 MHzParallel Output ResistanceParallel Output Capacitance6 ropcoo k pFInput Bias Current7 IbSIbC 12123030 AIbS+I1)I42.

4 IbC+I8)I102 Input Offset CurrentIioS = I1 I4; IioC = I8 I107 IioS IioC AAverage Temperature Coefficient of Input Offset Current(TA = 55 C to +125 C)7 TCIio nA/ COutput Offset Current (I6 I9)7 Ioo 1480 AAverage Temperature Coefficient of Output Offset Current(TA = 55 C to +125 C)7 TCIoo 90 nA/ CCommon Mode Input Swing, Signal Port, fS = kHz94 CMV VppCommon Mode Gain, Signal Port, fS = kHz, |VC|= Vdc9 ACM 85 dBCommon Mode Quiescent Output Voltage (Pin 6 or Pin 9)10 Vout VppDifferential Output Voltage Swing Capability10 Vout VppPower Supply Current I6 +I12 Power Supply CurrentI1476 ICCIEE Power Dissipation75PD 33 mW1. Tlow=0 C for MC1496 Thigh= +70 C for MC1496= 40 C for MC1496B = +125 C for MC1496 BMC1496, MC1496 OPERATING INFORMATIONC arrier FeedthroughCarrier feedthrough is defined as the output voltage atcarrier frequency with only the carrier applied(signal voltage = 0).

5 Carrier null is achieved by balancing the currents in thedifferential amplifier by means of a bias trim potentiometer(R1 of Figure 5).Carrier SuppressionCarrier suppression is defined as the ratio of eachsideband output to carrier output for the carrier and signalvoltage levels suppression is very dependent on carrier inputlevel, as shown in Figure 22. A low value of the carrier doesnot fully switch the upper switching devices, and results inlower signal gain, hence lower carrier suppression. A higherthan optimum carrier level results in unnecessary device andcircuit carrier feedthrough, which again degenerates thesuppression figure. The MC1496 has been characterizedwith a 60 mVrms sinewave carrier input signal. This levelprovides optimum carrier suppression at carrier frequenciesin the vicinity of 500 kHz, and is generally recommended forbalanced modulator feedthrough is independent of signal level, carrier suppression can be maximized by operatingwith large signal levels.

6 However, a linear operating modemust be maintained in the signal input transistor pair orharmonics of the modulating signal will be generated andappear in the device output as spurious sidebands of thesuppressed carrier. This requirement places an upper limiton input signal amplitude (see Figure 20). Note also that anoptimum carrier level is recommended in Figure 22 for goodcarrier suppression and minimum spurious higher frequencies circuit layout is very important inorder to minimize carrier feedthrough. Shielding may benecessary in order to prevent capacitive coupling betweenthe carrier input leads and the output Gain and Maximum Input LevelSignal gain (single ended) at low frequencies is definedas the voltage gain,AVS+VoVS+RLRe)2rewhere re+26 mVI5(mA)A constant dc potential is applied to the carrier inputterminals to fully switch two of the upper transistors on and two transistors off (VC = Vdc).

7 This in effectforms a cascode differential operation requires that the signal input be below acritical value determined by RE and the bias current p I5 RE (Volts peak)Note that in the test circuit of Figure 10, VS corresponds toa maximum value of V Mode SwingThe common mode swing is the voltage which may beapplied to both bases of the signal differential amplifier,without saturating the current sources or without saturatingthe differential amplifier itself by swinging it into the upperswitching devices. This swing is variable depending on theparticular circuit and biasing conditions DissipationPower dissipation, PD, within the integrated circuitpackage should be calculated as the summation of thevoltage current products at each port, assumingV12 = V6, I5 = I6 = I12 and ignoring base current,PD = 2 I5 (V6 V14) + I5)V5 V14 where subscripts referto pin EquationsThe following is a partial list of design equations neededto operate the circuit with other supply voltages and Operating CurrentThe internal bias currents are set by the conditions at Pin :I5 = I6 = I12,IBttIC for all transistorsthen :R5+V** I5*500 where: R5 is the resistor betweenwhere:Pin 5 and groundwhere.

8 = at TA = +25 CThe MC1496 has been characterized for the conditionI5 = mA and is the generally recommended Common Mode Quiescent Output VoltageV6 = V12 = V+ I5 RLBiasingThe MC1496 requires three dc bias voltage levels whichmust be set externally. Guidelines for setting up these threelevels include maintaining at least V collector base biason all transistors while not exceeding the voltages given inthe absolute maximum rating table;30 Vdc w [(V6, V12) (V8, V10)] w 2 Vdc30 Vdc w [(V8, V10) (V1, V4)] w Vdc30 Vdc w [(V1, V4) (V5)] w VdcThe foregoing conditions are based on the followingapproximations:V6 = V12, V8 = V10, V1 = V4MC1496, MC1496 currents flowing into Pins 1, 4, 8 and 10 are transistorbase currents and can normally be neglected if external biasdividers are designed to carry mA or BandwidthCarrier transadmittance bandwidth is the dB bandwidthof the device forward transadmittance as defined by: 21C+io(each sideband)vs(signal) Vo+0 Signal transadmittance bandwidth is the dB bandwidthof the device forward transadmittance as defined by.

9 21S+io(signal)vs(signal) Vc+ Vdc, Vo+0 Coupling and Bypass CapacitorsCapacitors C1 and C2 (Figure 5) should be selected for areactance of less than at the carrier SignalThe output signal is taken from Pins 6 and 12 eitherbalanced or single ended. Figure 11 shows the output levelsof each of the two output sidebands resulting from variationsin both the carrier and modulating signal inputs with asingle ended output SupplyVEE should be dc only. The insertion of an RF choke inseries with VEE can enhance the stability of the internalcurrent Port StabilityUnder certain values of driving source impedance,oscillation may occur. In this event, an RC suppressionnetwork should be connected directly to each input usingshort leads. This will reduce the Q of the source tunedcircuits that cause the Input(Pins 1 and 4)51010 pFAn alternate method for low frequency applications is toinsert a k resistor in series with the input (Pins 1, 4).

10 Inthis case input current drift may cause serious degradationof carrier :Shielding of input and output leads may be neededto properly perform these 5. Carrier Rejection and SuppressionFigure 6. Input Output ImpedanceFigure 7. Bias and Offset CurrentsFigure 8. Transconductance k kZout+ Vo++ kVCC12 F5110 kModulatingSignal InputCarrierInputVCCarrier Null515110 k50 kR1VS kI6I4614512 2Re = V810I141 kV I10I5 k VdcVEEVCC12 Vdc2Re = kModulatingSignal k23 ReVCC12 k+ Vo k10 kCarrier Null5110 k50 kV VdcVEE50 50810418104151 TEST CIRCUITSMC1496, MC1496 + kVCC12 Vdc8MC14962Re = k50+VS k k ACM+20 log Vo VSFigure 9. Common Mode GainFigure 10. Signal Gain and Output SwingV , OUTPUT AMPLITUDE OF EACH SIDEBAND (Vrms)Or , PARALLEL INPUT RESISTANCE (kipFigure 11. Sideband Output versusCarrier LevelsFigure 12.)