MCP4802/4812/4822 Data Sheet - Microchip Technology

1 2010-2015 Microchip Technology 1 MCP4802/4812/4822 Features MCP4802: Dual 8-Bit Voltage Output DAC MCP4812: Dual 10-Bit Voltage Output DAC MCP4822: Dual 12-Bit Voltage Output DAC Rail-to-Rail Output SPI Interface with 20 MHz Clock Support Simultaneous Latching of the Dual DACs with LDAC pin Fast Settling Time of s Selectable Unity or 2x Gain Output Internal Voltage Reference 50ppm/ C VREF Temperature Coefficient to Single-Supply Operation Extended Temperature Range: -40 C to +125 CApplications Set Point or Offset Trimming Sensor Calibration Precision Selectable Voltage Reference Portable Instrumentation (Battery-Powered) Calibration of Optical Communication DevicesDescriptionThe MCP4802/4812/4822 devices are dual 8-bit, 10-bitand 12-bit buffered voltage output Digital-to-AnalogConverters (DACs), respectively.

2 The devices operatefrom a single to supply with SPI compatibleSerial Peripheral Interface. The devices have a high precision internal voltagereference (VREF = ). The user can configure thefull-scale range of the device to be or bysetting the Gain Selection Option bit (gain of 1 of 2).Each DAC channel can be operated in Active orShutdown mode individually by setting the Configurationregister bits. In Shutdown mode, most of the internalcircuits in the shutdown channel are turned off for powersavings and the output amplifier is configured to presenta known high resistance output load (500 k typical.)

3 The devices include double-buffered registers,allowing synchronous updates of two DAC outputsusing the LDAC pin. These devices also incorporate aPower-on Reset (POR) circuit to ensure reliable devices utilize a resistive string architecture, withits inherent advantages of low DNL error, low ratiometric temperature coefficient and fast settling devices are specified over the extendedtemperature range (+125 C). The devices provide high accuracy and low noiseperformance for consumer and industrial applicationswhere calibration or compensation of signals (such astemperature, pressure and humidity) are required.

4 The MCP4802/4812/4822 devices are available in thePDIP, SOIC and MSOP packages. Package TypesRelated Products(1)P/NDAC ResolutionNo. of ChannelsVoltage Reference(VREF)MCP480181 Internal( )MCP4811101 MCP4821121 MCP480282 MCP4812102 MCP4822122 MCP490181 ExternalMCP4911101 MCP4921121 MCP490282 MCP4912102 MCP4922122 Note 1:The products listed here have similarAC/DC performances. MCP48X28-Pin PDIP, SOIC, MSOP12348765 CSSCKSDIVDDVSSVOUTAVOUTBLDACMCP4802: 8-bit dual DACMCP4812: 10-bit dual DACMCP4822: 12-bit dual DAC8/10/12-Bit Dual Voltage Output Digital-to-Analog Converterwith Internal VREF and SPI InterfaceMCP4802/4812/4822DS20002249B-pa ge 2 2010-2015 Microchip Technology DiagramOp AmpsVDDVSSCSSDISCKI nterface LogicInput Register ARegister BInput DACA RegisterRegisterDACB StringDACBS tringDACA OutputPower-on 2010-2015 Microchip Technology 3 MCP4802/4812 CHARACTERISTICSA bsolute Maximum Ratings inputs and outputs.

5 VSS to VDD + Current at Input Pins .. 2 mACurrent at Supply Pins .. 50 mACurrent at Output Pins .. 25 mAStorage temperature .. -65 C to +150 CAmbient temp. with power applied .. -55 C to +125 CESD protection on all pins 4 kV (HBM), 400V (MM)Maximum Junction Temperature (TJ)..+150 C Notice: Stresses above those listed under MaximumRatings may cause permanent damage to the is a stress rating only and functional operation ofthe device at those or any other conditions above thoseindicated in the operational listings of this specificationis not implied. Exposure to maximum rating conditionsfor extended periods may affect device CHARACTERISTICSE lectrical Specifications: Unless otherwise indicated, VDD = 5V, VSS = 0V, VREF = , Output Buffer Gain (G) = 2x, RL = 5 k to GND, CL = 100 pF, TA = -40 to +85 C.

6 Typical values are at +25 RequirementsInput CurrentIDD 415750 AAll digital inputs are grounded, all analog outputs (VOUT) are unloaded. Code = 0x000hSoftware Shutdown CurrentISHDN_SW 6 APower-on Reset ThresholdVPOR VDC AccuracyMCP4802 Resolutionn8 BitsINL ErrorINL-1 + 1 MCP4812 Resolutionn10 BitsINL + 1 MCP4822 Resolutionn12 BitsINL ErrorINL-12 212 LSbDNL + 1 Offset ErrorVOS-1 of FSR Code = 0x000hOffset Error TemperatureCoefficientVOS/ C ppm/ C-45 C to +25 C ppm/ C+25 C to +85 CGain Error of FSR Code = 0xFFFh, not including offset errorGain Error Temperature Coefficient G/ C -3 ppm/ CNote 1:Guaranteed monotonic by design over all.

7 This parameter is ensured by design, and not 100% 4 2010-2015 Microchip Technology Voltage Reference (VREF)Internal Reference when G = 1x andCode = 0xFFFhTemperature Coefficient(Note 2) VREF/ C 125325ppm/ C-40 C to 0 C C-40 C to 0 C 45160ppm/ C0 C to +85 C C0 C to +85 COutput Noise (VREF Noise)ENREF( Hz) 290 Vp-pCode = 0xFFFh, G = 1xOutput Noise DensityeNREF(1 kHz) V/ HzCode = 0xFFFh, G = 1xeNREF(10 kHz) V/ HzCode = 0xFFFh, G = 1x1/f Corner FrequencyfCORNER 400 HzOutput AmplifierOutput SwingVOUT toVDD VAccuracy is better than 1 LSb for VOUT = 10 mV to (VDD 40 mV)Phase MarginPM 66 Degree ( )CL= 400 pF, RL = slew RateSR V/ sShort Circuit CurrentISC 15 24mASettling TimetSETTLING sWithin 1/2 LSb of final value from 1/4 to 3/4 full-scale rangeDynamic Performance (Note 2)DAC-to-DAC Crosstalk <10 nV-sMajor Code Transition Glitch 45 nV-s1 LSb change around major carry ( to )Digital Feedthrough <10 nV-sAnalog Crosstalk <10 nV-sELECTRICAL CHARACTERISTICS (CONTINUED)Electrical Specifications: Unless otherwise indicated, VDD = 5V, VSS = 0V, VREF = , Output Buffer Gain (G) = 2x, RL = 5 k to GND, CL = 100 pF, TA = -40 to +85 C.

8 Typical values are at +25 1:Guaranteed monotonic by design over all :This parameter is ensured by design, and not 100% tested. 2010-2015 Microchip Technology 5 MCP4802/4812/4822 ELECTRICAL CHARACTERISTIC WITH EXTENDED TEMPERATUREE lectrical Specifications: Unless otherwise indicated, VDD = 5V, VSS = 0V, VREF = , Output Buffer Gain (G) = 2x, RL = 5 k to GND, CL = 100 pF. Typical values are at +125 C by characterization or RequirementsInput Current Input CurrenIDD 440 AAll digital inputs are grounded, all analog outputs (VOUT) are unloaded. Code = 0x000h. Software Shutdown CurrentISHDN_SW 5 APower-On Reset thresholdVPOR VDC AccuracyMCP4802 Resolutionn8 BitsINL ErrorINL LSb DNL DNL LSbNote 1 MCP4812 Resolutionn10 BitsINL ErrorINL 1 LSb DNL DNL LSbNote 1 MCP4822 Resolutionn12 BitsINL ErrorINL 4 LSb DNL DNL LSbNote 1 Offset ErrorVOS % of FSRCode = 0x000hOffset Error TemperatureCoefficientVOS/ C -5 ppm/ C+25 C to +125 CGain Error gE % of FSRCode = 0xFFFh, not including offset errorGain Error Temperature Coefficient G/ C -3 ppm/ CInternal Voltage Reference (VREF)

9 Internal Reference VoltageVREF VVOUTA when G = 1x andCode = 0xFFFhTemperature Coefficient (Note 2) VREF/ C 125 ppm/ C-40 C to 0 C LSb/ C-40 C to 0 C 45 ppm/ C0 C to +85 C LSb/ C0 C to +85 COutput Noise (VREF Noise)ENREF( 10 Hz) 290 Vp-pCode = 0xFFFh, G = 1xOutput Noise DensityeNREF(1 kHz) V/ HzCode = 0xFFFh, G = 1xeNREF(10 kHz) V/ HzCode = 0xFFFh, G = 1x1/f Corner FrequencyfCORNER 400 HzNote 1:Guaranteed monotonic by design over all :This parameter is ensured by design, and not 100% 6 2010-2015 Microchip Technology AmplifierOutput SwingVOUT to VDD VAccuracy is better than 1 LSb for VOUT = 10 mV to (VDD 40 mV)Phase MarginPM 66 Degree ( ) CL= 400 pF, RL = slew RateSR V/ sShort Circuit CurrentISC 17 mASettling TimetSETTLING sWithin 1/2 LSb of final value from 1/4 to 3/4 full-scale rangeDynamic Performance (Note 2)DAC-to-DAC Crosstalk <10 nV-sMajor Code Transition Glitch 45 nV-s1 LSb change around major carry ( to )Digital Feedthrough <10 nV-sAnalog Crosstalk <10 nV-sAC CHARACTERISTICS (SPI TIMING SPECIFICATIONS)

10 Electrical Specifications: Unless otherwise indicated, VDD = , TA= -40 to +125 C. Typical values are at +25 Trigger High-Level Input Voltage(All digital input pins) VDD VSchmitt Trigger Low-Level Input Voltage (All digital input pins)VIL of Schmitt Trigger InputsVHYS VInput Leakage CurrentILEAKAGE-1 1 ALDAC = CS = SDI = SCK = VDD or VSSD igital Pin Capacitance(All inputs/outputs)CIN, COUT 10 pFVDD = , TA = +25 C, fCLK = 1 MHz (Note 1)Clock FrequencyFCLK 20 MHzTA = +25 C (Note 1)Clock High TimetHI15 nsNote 1 Clock Low TimetLO15 nsNote 1CS Fall to First Rising CLK EdgetCSSR40 nsApplies only when CS falls with CLK high.