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MEMS digital output motion sensor: ultra-low …

This is information on a product in full production. May 2017 DocID025056 Rev 61/53 LIS2DH12 mems digital output motion sensor: ultra-low -power high-performance 3-axis "femto" accelerometerDatasheet - production dataFeatures Wide supply voltage, V to V Independent IO supply ( V) and supply voltage compatible ultra-low power consumption down to 2 A 2g/ 4g/ 8g/ 16g selectable full scales I2C/SPI digital output interface 2 independent programmable interrupt generators for free-fall and motion detection 6D/4D orientation detection Sleep-to-wake and return-to-sleep functions Free-fall detection motion detection Embedded temperature sensor Embedded FIFO ECOPACK , RoHS and Green compliantApplications motion -activated functions Display orientation Shake control Pedometer Gaming and virtual reality input devices Impact recognition and loggingDescriptionThe LIS2DH12 is an ultra-low -power high-performance three-axis linear accelerometer belonging to the femto family with digital I2C/SPI serial interface standard LIS2DH12 has user-selectable full scales of 2g/ 4g/ 8g/ 16g and is capable of measuring accelerations with output data rates from 1 Hz to self-test capability allows the user to check the functionality of the sensor in the final device may be configured to generate interrupt

This is information on a product in full production. May 2017 DocID025056 Rev 6 1/53 LIS2DH12 MEMS digital output motion sensor: ultra-low-power high-performance 3-axis "femto" accelerometer

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1 This is information on a product in full production. May 2017 DocID025056 Rev 61/53 LIS2DH12 mems digital output motion sensor: ultra-low -power high-performance 3-axis "femto" accelerometerDatasheet - production dataFeatures Wide supply voltage, V to V Independent IO supply ( V) and supply voltage compatible ultra-low power consumption down to 2 A 2g/ 4g/ 8g/ 16g selectable full scales I2C/SPI digital output interface 2 independent programmable interrupt generators for free-fall and motion detection 6D/4D orientation detection Sleep-to-wake and return-to-sleep functions Free-fall detection motion detection Embedded temperature sensor Embedded FIFO ECOPACK , RoHS and Green compliantApplications motion -activated functions Display orientation Shake control Pedometer Gaming and virtual reality input devices Impact recognition and loggingDescriptionThe LIS2DH12 is an ultra-low -power high-performance three-axis linear accelerometer belonging to the femto family with digital I2C/SPI serial interface standard LIS2DH12 has user-selectable full scales of 2g/ 4g/ 8g/ 16g and is capable of measuring accelerations with output data rates from 1 Hz to self-test capability allows the user to check the functionality of the sensor in the final device may be configured to generate interrupt signals by detecting two independent inertial wake-up/free-fall events as well as by the position of the device itself.

2 The LIS2DH12 is available in a small thin plastic land grid array package (LGA) and is guaranteed to operate over an extended temperature range from -40 C to +85 *$ [ [ PP Table 1. Device summaryOrder codeTemp. range [ C]PackagePackagingLIS2DH12TR-40 to +85 LGA-12 Tape and Rev 6 Contents1 Block diagram and pin description .. diagram .. description .. 82 Mechanical and electrical specifications .. characteristics .. sensor characteristics .. characteristics .. interface characteristics .. - serial peripheral interface .. - inter-IC control interface .. maximum ratings .. 153 Terminology and functionality .. level .. , normal mode, low-power mode .. / 4D orientation detection .. Sleep-to-wake and Return-to-sleep .. element .. interface .. calibration .. sensor .. 194 Application hints .. information.]]

3 215 digital main blocks .. 22 DocID025056 Rev 63 mode .. mode .. mode .. mode .. data from FIFO .. 236 digital interfaces .. serial interface .. operation .. bus interface .. read .. write .. read in 3-wire mode .. 307 Register mapping .. 318 Register description .. (07h) .. (0Ch), OUT_TEMP_H (0Dh) .. (0Fh) .. (1Eh) .. (1Fh) .. (20h) .. (21h) .. (22h) .. (23h) .. (24h) .. (25h) .. (26h) .. (27h) .. (28h), OUT_X_H (29h) .. (2Ah), OUT_Y_H (2Bh) .. (2Ch), OUT_Z_H (2Dh) .. (2Eh) .. (2Fh) .. 41 ContentsLIS2DH124/53 DocID025056 Rev (30h) .. (31h) .. (32h) .. (33h) .. (34h) .. (35h) .. (36h) .. (37h) .. (38h) .. (39h) .. (3Ah) .. (3Bh) .. (3Ch) .. (3Dh) .. (3Eh) .. (3Fh) .. 489 Package information.

4 Package information .. packing information .. 5010 Revision history .. 52 DocID025056 Rev 65/53 LIS2DH12 List of tables53 List of tablesTable summary .. 1 Table description .. 9 Table pull-up values (typ.) for SDO/SA0 pin .. 9 Table characteristics .. 10 Table sensor characteristics .. 11 Table characteristics .. 12 Table slave timing values.. 13 Table slave timing values .. 14 Table maximum ratings .. 15 Table mode selection .. 16 Table time for operating mode transition.. 17 Table consumption of operating modes.. 17 Table pin status .. 21 Table interface pin description .. 24 Table terminology ..24 Table +read/write patterns.. 25 Table when master is writing one byte to slave .. 25 Table when master is writing multiple bytes to slave .. 26 Table when master is receiving (reading) one byte of data from slave .. 26 Table when master is receiving (reading) multiple bytes of data from slave.

5 26 Table address map.. 31 Table register .. 33 Table description .. 33 Table register .. 33 Table register .. 33 Table description .. 33 Table register ..34 Table description .. 34 Table register .. 34 Table description .. 34 Table rate configuration .. 35 Table register .. 36 Table description .. 36 Table filter mode configuration ..36 Table register .. 36 Table description .. 36 Table register .. 37 Table description .. 37 Table mode configuration .. 37 Table register .. 38 Table description .. 38 Table register .. 38 Table description .. 38 Table register.. 39 Table description ..39 Table register .. 39 Table description ..39 Table register ..40 List of tablesLIS2DH126/53 DocID025056 Rev 6 Table description .. 40 Table mode configuration .. 40 Table register ..41 Table description ..41 Table register.

6 41 Table description .. 41 Table mode .. 42 Table register .. 42 Table description .. 42 Table register .. 43 Table description.. 43 Table register ..43 Table description ..43 Table register .. 44 Table description .. 44 Table mode .. 44 Table register .. 45 Table description .. 45 Table register .. 45 Table description.. 45 Table register ..46 Table description ..46 Table register.. 46 Table description .. 46 Table register.. 47 Table description .. 47 Table register .. 47 Table register description..47 Table register .. 47 Table description .. 47 Table register .. 48 Table description ..48 Table register.. 48 Table description ..48 Table register.. 48 Table description .. 48 Table register .. 48 Table description.. 48 Table dimensions for carrier tape of LGA-12 package .. 51 Table revision history.

7 52 DocID025056 Rev 67/53 LIS2DH12 List of figures53 List of figuresFigure diagram .. 8 Figure connections .. 8 Figure slave timing diagram .. 13 Figure slave timing diagram .. 14 Figure electrical connections ..20 Figure and write protocol .. 27 Figure read protocol .. 28 Figure byte SPI read protocol (2-byte example) .. 28 Figure write protocol .. 29 Figure byte SPI write protocol (2-byte example).. 29 Figure read protocol in 3-wire mode .. 30 Figure : package outline and mechanical data .. 49 Figure tape information for LGA-12 package .. 50 Figure package orientation in carrier tape .. 50 Figure information for carrier tape of LGA-12 package .. 51 Block diagram and pin descriptionLIS2DH128/53 DocID025056 Rev 61 Block diagram and pin Block diagramFigure 1. Block Pin descriptionFigure 2. Pin connectionsCHARGEAMPLIFIERY+Z+Y-Z-aX+X-I 2 CSPICSSCL/SPCSDA/SDI/SDOSDO/SA0 CONTROL LOGIC&INTERRUPT 1 CLOCKTRIMMINGCIRCUITST emperatureSELF TESTCONTROL A/D CONVERTERINT 2 MUX32 Level FIFOLOGICS ensorAM10218V2(TOP VIEW)DIRECTION OF THEDETECTABLEACCELERATIONSY1 XZVdd_IOSCL/SPCSDA/SDI/SDOCSSDO/SA0 RESGNDINT1 INT2 RESVddRES(BOTTOM VIEW)Pin 1 indicator4157118 RESRES1214 GNDSCL/SPCSDA/SDI/SDOCSSDO/SA0 GNDRESINT 1 Vdd_IO(BOTTOM VIEW)4156 GND11 INT 2710 Vdd12 DocID025056 Rev 69/53 LIS2DH12 Block diagram and pin description53 Table 2.

8 Pin description Pin#NameFunction1 SCLSPCI2C serial clock (SCL)SPI serial port clock (SPC)2 CSSPI enableI2C/SPI mode selection:1: SPI idle mode / I2C communication enabled 0: SPI communication mode / I2C disabled3(1)1. SDO/SA0 pin is internally pulled up. Refer to Table 3 for the internal pull-up values (typ).SDOSA0 SPI serial data output (SDO)I2C less significant bit of the device address (SA0)4 SDASDISDOI2C serial data (SDA)SPI serial data input (SDI)3-wire interface serial data output (SDO)5 ResConnect to GND6 GND0 V supply7 GND0 V supply8 GND0 V supply9 VddPower supply10 Vdd_IOPower supply for I/O pins11 INT2 Interrupt pin 212 INT1 Interrupt pin 1 Table 3. Internal pull-up values (typ.) for SDO/SA0 pinVdd_IOResistor value for SDO/SA0 pinTyp. (k ) and electrical specificationsLIS2DH1210/53 DocID025056 Rev 62 Mechanical and electrical Mechanical characteristics@ Vdd = V, T = 25 C unless otherwise noted(a)a.

9 The product is factory calibrated at V. The operational power supply range is from V to V. Table 4. Mechanical characteristics SymbolParameterTest (1) range(2)FS bit set to 00 bit set to 01 bit set to 10 bit set to 11 bit set to 00; High-resolution mode1mg/digitFS bit set to 00; Normal mode4FS bit set to 00; Low-power mode16FS bit set to 01;High-resolution mode2mg/digitFS bit set to 01;Normal mode8FS bit set to 01;Low-power mode32FS bit set to 10;High-resolution mode4mg/digitFS bit set to 10;Normal mode16FS bit set to 10;Low-power mode64FS bit set to 11;High-resolution mode12mg/digitFS bit set to 11;Normal mode48FS bit set to 11;Low-power mode192 TCSoSensitivity change vs. temperatureFS bit set to 00 CTyOffTypical zero-g level offset accuracy(3)FS bit set to 00 40mgDocID025056 Rev 611/53 LIS2DH12 Mechanical and electrical Temperature sensor characteristics@ Vdd = V, T = 25 C unless otherwise noted(b)TCOffZero-g level change vs.

10 TemperatureMax delta from 25 C CAnAcceleration noise densityFS bit set to 00, High-Resolution mode (Table 10), ODR > 1300 Hz220 g/ HzVstSelf-test output change(4) (5) (6)FS bit set to 00X-axis; Normal mode17360 LSbFS bit set to 00Y-axis; Normal mode17360 LSbFS bit set to 00Z-axis; Normal mode17360 LSbTo pOperating temperature range-40+85 C1. Typical specifications are not Verified by wafer level test and measurement of initial offset and Typical zero-g level offset value after factory calibration test at socket The sign of Self-test output change is defined by the ST bits in CTRL_REG4 (23h), for all Self-test output change is defined as the absolute value of: output [LSb](Self test enabled) - output [LSb](Self test disabled). 1 LSb = 4 mg at 10-bit representation, 2 g full scale6. After enabling the self-test, correct data is obtained after two samples (low-power mode / normal mode) or after eight samples (high-resolution mode).


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