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MT9J003 - 1/2.3‐Inch 10 Mp CMOS Digital Image Sensor

Semiconductor Components Industries, LLC, 2009 February, 2017 Rev. 51 Publication Order Number: MT9J003 /DMT9J003MT9J003 1 inch 10 MpCMOS Digital Image SensorGeneral DescriptionThe ON Semiconductor MT9J003 is a 1 cmos active-pixel Digital imaging Sensor with an active pixel array of 3856(H) x 2764 (V) including border pixels. It can support 10 megapixel(3664 (H) x 2748 (V)) Digital still images and a 1080 p (3840 (H) x2160 (V)) Digital video mode. It incorporates sophisticated on-chipcamera functions such as windowing, mirroring, column and row skipmodes, and snapshot mode.

MT9J003 www.onsemi.com 3 ORDERING INFORMATION Table 2. AVAILABLE PART NUMBERS Part Number Product Description Orderable Product Attribute Description †

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Transcription of MT9J003 - 1/2.3‐Inch 10 Mp CMOS Digital Image Sensor

1 Semiconductor Components Industries, LLC, 2009 February, 2017 Rev. 51 Publication Order Number: MT9J003 /DMT9J003MT9J003 1 inch 10 MpCMOS Digital Image SensorGeneral DescriptionThe ON Semiconductor MT9J003 is a 1 cmos active-pixel Digital imaging Sensor with an active pixel array of 3856(H) x 2764 (V) including border pixels. It can support 10 megapixel(3664 (H) x 2748 (V)) Digital still images and a 1080 p (3840 (H) x2160 (V)) Digital video mode. It incorporates sophisticated on-chipcamera functions such as windowing, mirroring, column and row skipmodes, and snapshot mode.

2 It is programmable through a simpletwo-wire serial interface and has very low power MT9J003 Digital Image Sensor features ON Semiconductor sbreakthrough low-noise cmos imaging technology that achievesnear-CCD Image quality (based on signal-to-noise ratio and low-lightsensitivity) while maintaining the inherent size, cost, and integrationadvantages of operated in its default 4:3 still-mode, the Sensor generates afull resolution Image at 15 frames per second (fps) using the HiSPiserial interface.

3 An on-chip analog-to- Digital converter (ADC)generates a 12-bit value for each 1080p Digital Video Mode Simple Two-wire Serial Interface Auto Black Level Calibration Support for External Mechanical Shutter Support for External LED or Xenon Flash High Frame Rate Preview Mode with Arbitrary Down-size Scalingfrom Maximum Resolution Programmable Controls: Gain, Horizontal and Vertical Blanking,Auto Black Level Offset Correction, Frame Size/rate, Exposure,Left right and Top bottom Image Reversal, Window Size, andPanning Data Interfaces.

4 Parallel or Four-lane Serial High-speed PixelInterface (HiSPi) Differential Signaling (Sub-LVDS) On-die Phase-locked Loop (PLL) Oscillator Bayer Pattern Downsize Scaler Integrated Position-based Color and Lens Shading Correction One-time Programmable Memory (OTPM) for Storing ModuleInformationApplications Digital Video Cameras Digital Still detailed ordering and shipping information on page 3 ofthis data INFORMATIONILCC48 10x10 CASE 1. KEY PARAMETERSP arameterValueOptical Format1 (4:3)Active Imager mm (H) x mm (V), mm Diagonal (Entire Sensor ) mm (H) x mm (V), mm Diagonal (Still Mode) mm (H) x mm (V), mm Diagonal (Video Mode)Active Pixels3856 (H) x 2764 (V) (Entire Sensor )3664 (H) x 2748 (V) (4:3, Still Mode)3840 (H) x 2160 (V) (16.)

5 9, Video Mode)Pixel x mChief Ray Angle0 , Color Filter ArrayRGB Bayer PatternShutter TypeElectronic Rolling Shutter (ERS) with Global Reset Release (GRR)Maximum Data Rate96 Mp/sMaximum Master Clock60 MHzInput Clock Frequency6 48 MHzMaximum Data RateParallel80 Mp/s at 80 MHz PIXCLKHiSPi (4-lane) GbpsFrame RateStill Mode, 4:3 (3664 (H) x 2748 (V)Programmable up to 15 fps Serial I/F, fps Parallel I/FPreview ModeVGA30 fps with Binning60 fps with Skip2bin21080p Mode(1920 H x 1080 V)60 fps Using HiSPi I/F30 fps Using Parallel I/FADC Resolution12-bit, V/lux-sec (550 nm)Dynamic dBSNRMAX34 dBSupply VoltageI/O (V) ( (V) Nominal)or (V) ( (V) Nominal) (V) ( (V) Nominal) (V) ( (V) Nominal)SLVS (V) ( or (V) Nominal)

6 Power ConsumptionStill Mode at 15 fps w/ Serial I/F638 mWStill Mode at fps w/ Parallel I/F388 mWPreview250 mW Low Power VGAS tandby500 W (Typical, EXTCLK Disabled)Power ConsumptionTBDP ackage48-pin iLCC (10 mm x 10 mm) Bare Die,48pin Tiny PLCC (12 mm x 12 mm)Operating Temperature 30 C to +70 C (at Junction) INFORMATIONT able 2. AVAILABLE PART NUMBERS Part NumberProduct DescriptionOrderable Product Attribute Description MT9J003D00 STMUC2 CBC1-20010 MP 1 CISDie Sales, 200 m ThicknessMT9J003I12 STCU-DP10 MP 1 CISDry Pack with Protective FilmMT9J003I12 STCU-DR10 MP 1 CISDry Pack without Protective FilmMT9J003I12 STCV2-DP10 MP 1 CISDry Pack with Protective FilmMT9J003I12 STCV2-TP10 MP 1 CISTape & Reel with Protective FilmMT9J003I12 STMU-DP10 MP 1 CISDry Pack with Protective Film For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel PackagingSpecification Brochure.

7 BRD8011 OVERVIEWThe MT9J003 is a progressive-scan Sensor that generatesa stream of pixel data at a constant frame rate. It uses anon-chip, phase-locked loop (PLL) to generate all internalclocks from a single master input clock running between6 and 48 MHz. The maximum output pixel rate is 80 Mp/s,corresponding to a pixel clock rate of 80 MHz. A blockdiagram of the Sensor is shown in Figure 1. Block DiagramActive PixelSensor (APS)ArrayAnalog ProcessingADCS calerLimiterShadingCorrectionFIFOT iming ControlControl RegistersDataOutTwo-wireSerialInterfaceS yncSignalsThe core of the Sensor is a 10 Mp active-pixel array.

8 Thetiming and control circuitry sequences through the rows ofthe array, resetting and then reading each row in turn. In thetime interval between resetting a row and reading that row,the pixels in the row integrate incident light. The exposureis controlled by varying the time interval between reset andreadout. Once a row has been read, the data from thecolumns is sequenced through an analog signal chain(providing offset correction and gain), and then through anADC. The output from the ADC is a 12-bit value for eachpixel in the array.

9 The ADC output passes through a digitalprocessing signal chain (which provides further data pathcorrections and applies Digital gain).The pixel array contains optically active andlight-shielded ( dark ) pixels. The dark pixels are used toprovide data for on-chip offset-correction algorithms( black level control).The Sensor contains a set of control and status registersthat can be used to control many aspects of the sensorbehavior including the frame size, exposure, and gainsetting.

10 These registers can be accessed through a two-wireserial output from the Sensor is a Bayer pattern; alternaterows are a sequence of either green and red pixels or blue andgreen pixels. The offset and gain stages of the analog signalchain provide per-color control of the pixel control registers, timing and control, and digitalprocessing functions shown in Figure 1 are partitioned intothree logical parts: A Sensor core that provides array control and data pathcorrections. The output of the Sensor core is a 12-bitparallel pixel data stream qualified by an output dataclock (PIXCLK), together with LINE_VALID (LV) andFRAME_VALID (FV) signals or a 4-lane serialhigh-speed pixel interface (HiSPi).


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