NCP1336 - Quasi-Resonant Current Mode …

1 Semiconductor Components Industries, LLC, 2017 March, 2017 Rev. 41 Publication Order Number: NCP1336 /DNCP1336A/BQuasi-Resonant CurrentMode Controller for HighPower Universal Off-LineSuppliesThe NCP1336 hosts a high performance circuitry aimed topowering quasi resonant converters. Capitalizing on a novelvalley lockout system, the controller shifts gears and reduces theswitching frequency as the power loading becomes lighter. Thisresults in a stable operation despite switching events always occurringin the drain source valley. This system works down to the 4th valleyand toggles to a variable frequency mode beyond, ensuring anexcellent standby power controller takes benefit of a high voltage start up currentsource to provide a quick and lossless power on sequence. To improvethe safety in overload situations, the controller includes an Over PowerProtection circuit which clamps the delivered power at high wise, an adjustable timer relies on the feedback voltage todetect a fault.

2 On version B, this fault triggers a triple hiccup on theVCC pin which naturally reduces the average input power drawn bythe converter. On version A, when a fault is detected, the controller islatched well suited for adapter applications, the controllerfeatures two latch inputs: one dedicated to Over Temperatureprotection (OTP) which offers an easy means to connect a pull downtemperature sensor like an NTC, and a second one more classical thatcan be used to perform an accurate Over Voltage , a brownout pin which stops the circuit operation in presenceof a low mains condition is Quasi Resonant Peak Current Mode Control Operation Valley Switching Operation with Valley Lockout for Noise ImmuneOperation Internal 5 ms Soft Start Loss Free Adjustable Over Power Protection Auto Recovery or Latched Internal Output Short Circuit Protection Adjustable Timer for Improved Short Circuit Protection Overvoltage and Overtemperature Protection Inputs Brownout Input 500 mA/+800 mA Peak Current Source/SinkCapability Internal Temperature Shutdown Direct Optocoupler Connection 3 ms Blanking Delay to Ignore Leakage Ringing atTurn Off Extremely Low No Load and Standby Power SO14 Package These are Pb Free Devices This Device uses Halogen Free Molding CompoundTypical Applications High Power ac dc Converters for TVs.

3 Set Top Boxes etc Offline Adapters for 14 CASE 751 ANSUFFIX OPIN CONNECTIONSMARKINGDIAGRAMA= Assembly Locationx= A or BWL= Wafer LotY= YearWW= Work WeekG= Pb Free Package(Top View)HVBOOVPVCCDRVGNDOTPOPPZCDT imerCtFBCSQUASI RESONANT PWMCONTROLLER FOR HIGH POWERAC DC WALL ADAPTERSSee detailed ordering and shipping information in the packagedimensions section on page 25 of this data INFORMATION114 NCP1336xGAWLYWW114 NCP1336 FUNCTION DESCRIPTIONPin NameFunctionPin Description1 OPPA djust the Over PowerProtectionA negative voltage applied to this pin reduces the internal maximum peakcurrent setpoint. Connecting it to an auxiliary winding through a resistordivider thus performs Over Power compensation. If grounded, OPP is TemperatureProtectionConnect an NTC between this pin and GND pin. Pin 2 features an internalcurrent source that biases the NTC. When the NTC pulls the pin down, thecircuit permanently latches a capacitor to ground helps selecting the timer Crossing DetectionConnected to the auxiliary winding, this pin detects the core reset CapacitorA capacitor connected to this pin acts as the timing capacitor in PinHooking an optocoupler collector to this pin will allow SenseThis pin monitors the primary peak This pin is the controller OutputThis pin is the driver s output to an external the ControllerThis pin is connected to an external auxiliary pin is the brownout Voltage ProtectionBy pulling this pin high, the controller can be permanently latched This pin is omitted for improved Voltage InputConnected to the bulk capacitor, this pin powers the internal Current sourceto deliver a startup PROTECTION ON NCP1336 VERSIONSAuto Recovery Overcurrent protectionLatchedOvercurrent protectionNCP1336 / AXNCP1336 / BXNCP1336 1.

4 Typical Application ExampleVoutHV bulkGNDGNDNCP1336 OVPOTPBOOPPZCD1234567910111213148+++VinN CP1336 2. Internal Circuit Architecture+ + + + FBCtICt1st2nd3rd4thVCO+ + ZCDLaux10 VESDVthDRVleakage blanking+ 5us Timeout100 nsDecimal Counter1 DemagCLKSRQCSR senseLeadingEdgeBlanking+ Ilimit+ Vopp/4 OPP+ IBON oise DelayHVVBO+ + VCCT VOVPVOTPSRQ noise delayOTPT imerVDDVDDVDDSoft Start+ ItimerCVddVCCAuxVCC ManagementLatchVDDHVHVHVS tartupRpulluprstFaultBO ResetDRVGateGrandResetGrandResetGrandRes etDRVGNDI peak_min = 25% LimitClampSoft Start End ? Then 1 Else 0A & C:LatchedIpFlagVDDIOTPOVP+Ilimit+ + SS EndSS EndItimerDSRQIpFlagPWM ResetPWMR eset234 QQQCtSetpointDischargeCtPNOKTSD+BO ResetBOLOVP resetNCP1336 RATINGS TABLES ymbolRatingValueUnitVCCmaxICCmaxMaximum Power Supply voltage, VCC pin, continuous voltageMaximum Current for VCC Pin to 28$30 VmAVHVmaxIHVmaxHigh voltage pin (pin 14) voltage rangePin 14 Current range to 500$20 VmAVmaxImaxMaximum voltage on low power pins (except pin 4, pin 9, pin 10 and pin 14) Current range for low power pins (except pin 4, pin 9, pin 10 and pin 14) to 10$10 VmAVZDC,dcIZDC,dcMaximum continuous voltage on pin 4 Maximum continuous Current on pin 4 to 10$10 VmAVZDC,pulseIZDC,pulseMaximum positive pulsed voltage (pulse duration below 100 ms) on pin 4 Maximum positive pulsed Current (pulse duration below 100 ms) on pin 4+12+3 VmAVOPPmaxIOPPnegRecommended maximum operating voltage on pin OPP (pin 1)Maximum negative Current into OPP pin (pin 1)

5 3002mVmAVDRV(MAX)Maximum DRV pin voltage when DRV is in High stateVCC + Resistance Junction to Air120 C/WTJMAXM aximum Junction Temperature150 CStorage Temperature Range 60 to +150 CESD Capability, HBM model (All pins except HV) (Note 1)2kVESD Capability, Machine Model (All pins except DRV) (Note 1)200 VESD Capability, Machine Model (DRV pin) (Note 1)160 VStresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionalityshould not be assumed, damage may occur and reliability may be This device series contains ESD protection rated using the following tests: Human Body Model 2000 V per JEDEC standard JESD22, MethodA114E. Machine Model Method 200 V per JEDEC standard JESD22, Method This device contains latch up protection and exceeds 100 mA per JEDEC Standard CHARACTERISTICS(For typical values TJ = 25 C, for min/max values TJ = 40 C to +125 C, Max TJ = 150 C, VCC = 12 V unless otherwise noted)SymbolRatingMinTypMaxUnitSUPPLY SECTIONVCConVCC increasing level at which the Current source turns off141516 VVCCminVCC level below which output pulses are stopped8910 VVCC resetInternal latch reset level VICC1 Internal IC consumption, no output load on DRV pin (Fsw = 10 kHz) for a Feedback Voltage Equal to VHVCO (internal bias reduction), with CT =220 pF (corresponding to an Fsw of about 20 kHz) IC consumption, 1 nF output load on pin 9, Fsw = 65 kHz IC consumption, hiccup phase (VCCmin < VCC < VCCon) STARTUP Current SOURCE (TJ > 05C) (HV Pin Biased to 60 Vdc)IC2 High voltage Current source, VCC = 10 V (Note 3)

6 369mAIC1 High voltage Current source, VCC = 0150300550mAVThVCC transition level for IC1 to IC2 toggling point (IHV = mA) Current for the high voltage source, VHV(pin) = 500 Vdc11230mADRIVE OUTPUTTrOutput voltage rise time @ CL = 1 nF, 10% 90% of a 12 V output signal 4075nsTfOutput voltage fall time @ CL = 1 nF, 10% 90% of a 12 V output signal 2560nsIsourceSource Current capability at VDRV = 2 V 500 mAIsinkSink Current capability at VDRV = 10 V 800 mAVDRVlowDRV pin level at VCC close to VCCmin with a 33 kW resistor to GND and a 1 nFcapacitor to VVDRV highDRV pin level at VCC = 28 V with a 1 nF capacitor to GND (Note 3) 17 VDEMAGNETIZATION INPUTVthInput threshold voltage (VZCD(pin) decreasing)355590mVVHH ysteresis (VZCD(pin) increasing)153555mVVCHVCLI nput clamp voltageHigh state (IZCD(pin) = mA)Low state (IZCD(pin) = mA)8 propagation delay (VZCD(pin) decreasing from 4 V to V) 150250nsCparInternal input capacitance at VZCD(pin) = 1 V 10 pFTblankBlanking Delay after tON234msToutTimeout after last demag COMPARATORIIBI nput Bias Current @ 1 V input level on CS pin mAILimit1 Maximum internal Current setpoint TJ = 25 C OPP pin internal Current setpoint TJ from 40 C to 125 C OPP pin of maximum peak Current level at which VCO takes over (Note 4)222528%TDELP ropagation delay from Current detection to gate OFF state 100160nsTLEBL eading Edge Blanking DurationTJ = 5 C to +125 CTJ = 40 C to +125 C240240295295350360ns3.

7 Minimum value for TJ = 125 The peak Current setpoint goes down as the load decreases. It is frozen below Ipeak_VCO (Ipeak = cst)5. If negative voltage in excess to 300 mV is applied to OPP pin, the Current setpoint decrease is no longer guaranteed to be NTC on OTP pin with R = kW at 110 CHARACTERISTICS(For typical values TJ = 25 C, for min/max values TJ = 40 C to +125 C, Max TJ = 150 C, VCC = 12 V unless otherwise noted)SymbolUnitMaxTypMinRatingCURRENT COMPARATOROPPmaxSetpoint decrease for VOPP = 300 mV (Note 5) decrease for OPP pin shorted to ground 0 %TIMING CAPACITORVCTmaxMaximum voltage on Ct capacitor, VFB < VICTS ource Current (Ct pin grounded)TJ = 5 C to +125 CTJ = 40 C to +125 voltage on Ct, discharge switch activated 90mVCtRecommended timing capacitor value 220 pFFEEDBACK SECTIONR pullupInternal pullup resistorTJ = 5 C to +125 CTJ = 40 C to +125 pin to Current setpoint division pin threshold under which the Ct capacitor is clamped to voltage where 1st valley ends and 2nd valley starts (VFB decreasing)

8 Voltage where 2nd valley ends and 3rd valley starts (VFB decreasing) voltage where 3rd valley ends and 4th valley starts (VFB decreasing) voltage where 4th valley ends and VCO starts (VFB decreasing) voltage where VCO ends and 4th valley starts (VFB increasing) voltage where 4th ends and 3rd valley starts (VFB increasing) voltage where 3rd ends and 2nd valley starts (VFB increasing) voltage where 2nd ends and 1st valley starts (VFB increasing) before latch confirmation (noise immunity)152025msIlatchInternal source Current for OTP (Note 6)TJ = 5 C to +125 CTJ = 40 C to +125 C858293939798mAIlatch110 Internal source Current for OTP @ 110 C (Note 6) 91 mAVOTPF ault detection level for OTP (Note 6) Level capacitor charging currentTJ = 5 C to +125 CTJ = 40 C to +125 capacitor discharging length, Ctimer = mF typical 50 msTSSSoft start duration 5 msTSDT emperature shutdown140 CTSDhysTemperature shutdown hysteresis 40 C3.

9 Minimum value for TJ = 125 The peak Current setpoint goes down as the load decreases. It is frozen below Ipeak_VCO (Ipeak = cst)5. If negative voltage in excess to 300 mV is applied to OPP pin, the Current setpoint decrease is no longer guaranteed to be NTC on OTP pin with R = kW at 110 CHARACTERISTICS(For typical values TJ = 25 C, for min/max values TJ = 40 C to +125 C, Max TJ = 150 C, VCC = 12 V unless otherwise noted)SymbolUnitMaxTypMinRatingBROWNOUT PROTECTIONVBOB rownout Current , VBO(pin) < VBOTJ = 5 C to +125 CTJ = 40 C to +125 before BO confirmation (noise immunity)111723msIBObiasBrownout input bias Current mA3. Minimum value for TJ = 125 The peak Current setpoint goes down as the load decreases. It is frozen below Ipeak_VCO (Ipeak = cst)5. If negative voltage in excess to 300 mV is applied to OPP pin, the Current setpoint decrease is no longer guaranteed to be NTC on OTP pin with R = kW at 110 INFORMATIONNCP1336 implements a standard Current modearchitecture operating in quasi resonant mode.

10 Thanks to anovel circuitry, the controller prevents valley jumpinginstability and steadily locks out in selected valley as thepower demand goes down. Once the fourth valley is reached,the controller continues to reduce the frequency furtherdown, offering excellent efficiency over a wide operatingrange. Thanks to a fault timer combined to an OPP circuitry,the controller is able to efficiently limit the output power athigh line. Quasi Resonance Current mode operation:implementing quasi resonance operation in peakcurrent mode control, the NCP1336 optimizes theefficiency by switching in the valley of the MOSFET drain source voltage. Thanks to a novel circuitry, thecontroller locks out in a selected valley and remainslocked until the output loading significantly behavior is obtained by monitoring the feedbackvoltage. When the load becomes lighter, the feedbacksetpoint changes and the controller jumps into the nextvalley.