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TL494 - Switch mode Pulse Width Modulation Control Circuit

DATA Semiconductor Components Industries, LLC, 2005 August, 2021 Rev. 71 Publication Order Number: TL494 /DSwitch mode Pulse WidthModulation Control CircuitTL494, NCV494 The TL494 is a fixed frequency, Pulse Width Modulation controlcircuit designed primarily for Switch mode power supply Complete Pulse Width Modulation Control Circuitry On Chip Oscillator with Master or Slave Operation On Chip Error Amplifiers On Chip V Reference Adjustable Deadtime Control Uncommitted Output Transistors Rated to 500 mA Source or Sink Output Control for Push Pull or Single Ended Operation Undervoltage Lockout NCV Prefix for Automotive and Other Applications Requiring Siteand Control Changes Pb Free packages are Available*MAXIMUM RATINGS (Full operating)

SOIC−16 D SUFFIX CASE 751B See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ORDERING INFORMATION TL494xDG AWLYWW x = B, C or I A = Assembly Location WL = Wafer Lot YY, Y = Year WW, W = Work Week G = Pb−Free Package 1 16 PDIP−16 N SUFFIX CASE 648 *This marking diagram also ...

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Transcription of TL494 - Switch mode Pulse Width Modulation Control Circuit

1 DATA Semiconductor Components Industries, LLC, 2005 August, 2021 Rev. 71 Publication Order Number: TL494 /DSwitch mode Pulse WidthModulation Control CircuitTL494, NCV494 The TL494 is a fixed frequency, Pulse Width Modulation controlcircuit designed primarily for Switch mode power supply Complete Pulse Width Modulation Control Circuitry On Chip Oscillator with Master or Slave Operation On Chip Error Amplifiers On Chip V Reference Adjustable Deadtime Control Uncommitted Output Transistors Rated to 500 mA Source or Sink Output Control for Push Pull or Single Ended Operation Undervoltage Lockout NCV Prefix for Automotive and Other Applications Requiring Siteand Control Changes Pb Free packages are Available*MAXIMUM RATINGS (Full operating)

2 Ambient temperature range applies,unless otherwise noted.)RatingSymbolValueUnitPower Supply VoltageVCC42 VCollector Output VoltageVC1,VC242 VCollector Output Current(Each transistor) (Note 1)IC1, IC2500mAAmplifier Input Voltage RangeVIR to +42 VPower Dissipation @ TA 45 CPD1000mWThermal Resistance, Junction to AmbientRqJA80 C/WOperating Junction TemperatureTJ125 CStorage Temperature RangeTstg 55 to +125 COperating Ambient Temperature RangeTL494 BTL494 CTL494 INCV494 BTA 40 to +1250 to +70 40 to +85 40 to +125 CDerating Ambient TemperatureTA45 CStresses exceeding those listed in the Maximum Ratings table may damage thedevice.

3 If any of these limits are exceeded, device functionality should not beassumed, damage may occur and reliability may be Maximum thermal limits must be observed.*For additional information on our Pb Free strategy and soldering details, pleasedownload the onsemi Soldering and Mounting Techniques Reference Manual, 16D SUFFIXCASE 751 BSee detailed ordering and shipping information in the packagedimensions section on page 4 of this data INFORMATIONTL494xDGAWLYWWx= B, C or IA= Assembly LocationWL= Wafer LotYY, Y= YearWW, W= Work WeekG= Pb Free Package116 PDIP 16N SUFFIXCASE 648*This marking diagram also applies to CONNECTIONSCTRTG roundC11 InvInputC2Q2E2E11 VREF(Top View)

4 NoninvInputInvInputVrefOutputControlVCCN oninvInputCompen/PWNComp InputDeadtimeControlErrorAmp+-2345678910 1112131415162 ErrorAmp+-Q1TL494xNAWLYYWWG*116TL494, OPERATING CONDITIONSC haracteristicsSymbolMinTypMaxUnitPower Supply Output VoltageVC1, VC2 3040 VCollector Output Current (Each transistor)IC1, IC2 200mAAmplified Input VoltageVin VCC Into Feedback Terminallfb Output Currentlref 10mATiming CHARACTERISTICS (VCC = 15 V, CT = mF, RT = 12 kW, unless otherwise noted.)For typical values TA = 25 C, for min/max values TA is the operating ambient temperature range that applies, unless otherwise SECTIONR eference Voltage (IO = mA) Regulation (VCC = V to 40 V)Regline Regulation (IO = mA to 10 mA)Regload Circuit Output Current (Vref = 0 V)ISC153575mAOUTPUT SECTIONC ollector Off State Current(VCC = 40 V, VCE = 40 V)IC(off) Off State CurrentVCC = 40 V, VC = 40 V, VE = 0 V)IE(off) 100mACollector Emitter Saturation Voltage (Note 2)Common Emitter (VE = 0 V, IC = 200 mA)

5 Emitter Follower (VC = 15 V, IE = 200 mA)Vsat(C)Vsat(E) Control Pin CurrentLow State (VOC v V)High State (VOC = Vref)IOCLIOCH Voltage Rise TimeCommon Emitter (See Figure 12)Emitter Follower (See Figure 13)tr 100100200200nsOutput Voltage Fall TimeCommon Emitter (See Figure 12)Emitter Follower (See Figure 13)tf 2540100100ns2. Low duty cycle Pulse techniques are used during test to maintain junction temperature as close to ambient temperature as , CHARACTERISTICS (VCC = 15 V, CT = mF, RT = 12 kW, unless otherwise noted.)For typical values TA = 25 C, for min/max values TA is the operating ambient temperature range that applies, unless otherwise AMPLIFIER SECTIONI nput Offset Voltage (VO (Pin 3) = V)VIO Offset Current (VO (Pin 3) = V)IIO Bias Current (VO (Pin 3) = V)IIB Common Mode Voltage Range (VCC = 40 V, TA = 25 C)VICR to VCC Loop Voltage Gain (DVO = V, VO = V to V, RL = kW)AVOL7095 dBUnity Gain Crossover Frequency (VO = V to V, RL = kW)fC 350 kHzPhase Margin at Unity Gain (VO = V to V, RL = kW)

6 Fm 65 Mode Rejection Ratio (VCC = 40 V)CMRR6590 dBPower Supply Rejection Ratio (DVCC = 33 V, VO = V, RL = kW)PSRR 100 dBOutput Sink Current (VO (Pin 3) = V)IO mAOutput Source Current (VO (Pin 3) = V)IO+ mAPWM COMPARATOR SECTION (Test Circuit Figure 11)Input Threshold Voltage (Zero Duty Cycle)VTH Sink Current (V(Pin 3) = V)II mADEADTIME Control SECTION (Test Circuit Figure 11)Input Bias Current (Pin 4) (VPin 4 = 0 V to V)IIB (DT) 10mAMaximum Duty Cycle, Each Output, Push Pull Mode(VPin 4 = 0 V, CT = mF, RT = 12 kW)(VPin 4 = 0 V, CT = mF, RT = 30 kW)DCmax45 48455050%Input Threshold Voltage (Pin 4)(Zero Duty Cycle)(Maximum Duty Cycle)Vth VOSCILLATOR SECTIONF requency (CT = mF, RT = 30 kW)fosc 40 kHzStandard Deviation of Frequency* (CT = mF, RT = 30 kW)sfosc %Frequency Change with Voltage (VCC = V to 40 V, TA = 25 C)Dfosc (DV) %Frequency Change with Temperature (DTA = Tlow to Thigh)(CT = mF, RT = 12 kW)Dfosc (DT) 12%UNDERVOLTAGE LOCKOUT SECTIONTurn On Threshold (VCC increasing, Iref = mA)

7 DEVICES tandby Supply Current (Pin 6 at Vref, All other inputs and outputs open)(VCC = 15 V)(VCC = 40 V)ICC Supply Current(CT = mF, RT = 12 kW, V(Pin 4) = V)(VCC = 15 V) (See Figure 12) mA* Standard deviation is a measure of the statistical distribution about the mean as derived from the formula, sNn = 1S (Xn X)2N 1TL494, INFORMATIOND evicePackageShipping TL494 BDSOIC 1648 Units / RailTL494 BDGSOIC 16(Pb Free)48 Units / RailTL494 BDR2 SOIC 162500 Tape & ReelTL494 BDR2 GSOIC 16(Pb Free)2500 Tape & ReelTL494 CDSOIC 1648 Units / RailTL494 CDGSOIC 16(Pb Free)48 Units / RailTL494 CDR2 SOIC 162500 Tape & ReelTL494 CDR2 GSOIC 16(Pb Free)2500 Tape & ReelTL494 CNPDIP 1625 Units / RailTL494 CNGPDIP 16(Pb Free)25 Units / RailTL494 INPDIP 1625 Units / RailTL494 INGPDIP 16(Pb Free)25 Units / RailNCV494 BDR2*SOIC 162500 Tape & ReelNCV494 BDR2G*SOIC 16(Pb Free)

8 2500 Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel PackagingSpecifications Brochure, BRD8011/D.*NCV494: Tlow = 40 C, Thigh = +125 C. Guaranteed by design. NCV prefix is for automotive and other applications requiring site and , 1. Representative Block DiagramFigure 2. Timing +1--+-++2-DQCk-++ Amp1 Feedback PWMC omparator ControlError Amp2 DeadtimeComparatorPWMC omparatorQCapacitor CTFeedback/PWM ControlFlip-FlopClock InputFlip-FlopQFlip-FlopQOutput Q1 EmitterOutput Q2 EmitterOutputControlThis device contains 46 active , INFORMATIOND escriptionThe TL494 is a fixed frequency Pulse Width modulationcontrol Circuit , incorporating the primary building blocksrequired for the Control of a switching power supply.

9 (SeeFigure 1.) An internal linear sawtooth oscillator isfrequency programmable by two external components, RTand CT. The approximate oscillator frequency is determinedby:fosc CTFor more information refer to Figure Pulse Width Modulation is accomplished bycomparison of the positive sawtooth waveform acrosscapacitor CT to either of two Control signals. The NOR gates,which drive output transistors Q1 and Q2, are enabled onlywhen the flip flop clock input line is in its low state. Thishappens only during that portion of time when the sawtoothvoltage is greater than the Control signals.

10 Therefore, anincrease in Control signal amplitude causes a correspondinglinear decrease of output Pulse Width . (Refer to the TimingDiagram shown in Figure 2.)The Control signals are external inputs that can be fed intothe deadtime Control , the error amplifier inputs, or thefeedback input. The deadtime Control comparator has aneffective 120 mV input offset which limits the minimumoutput deadtime to approximately the first 4% of thesawtooth cycle time. This would result in a maximum dutycycle on a given output of 96% with the output controlgrounded, and 48% with it connected to the reference deadtime may be imposed on the output bysetting the deadtime Control input to a fixed voltage,ranging between 0 V to TableInput/Out


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