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Trends, Transitions, and Inflection Points in ...

IEEE Electronics packaging Society (EPS), Santa Clara Valley ChapterFebruary 14, "Trends, Transitions, and Inflection Points in Semiconductor packaging "F b14 2018 February 14, 2018 Dan Tracy, Sr. DirectorSEMI Industry Research & StatisticsOutline Quick 2017 Overview Semiconductor Industry Outlook and Market DriversSemiconductor Industry Outlook and Market Drivers packaging Market Trends Business and technology Material Segments China SummaryIEEE Electronics packaging Society (EPS), Santa Clara Valley ChapterFebruary 14, Overview2017-A Record Setting Year 2017 is a record setting year for the industry Semiconductor sales.

Semiconductor Packaging" F b 14 2018February 14, 2018 Dan Tracy, Sr. Director SEMI Industry Research & Statistics ... packaging and assembly at the wafer level ... • WB to FC • FO-WLP is a disruptive technology

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Transcription of Trends, Transitions, and Inflection Points in ...

1 IEEE Electronics packaging Society (EPS), Santa Clara Valley ChapterFebruary 14, "Trends, Transitions, and Inflection Points in Semiconductor packaging "F b14 2018 February 14, 2018 Dan Tracy, Sr. DirectorSEMI Industry Research & StatisticsOutline Quick 2017 Overview Semiconductor Industry Outlook and Market DriversSemiconductor Industry Outlook and Market Drivers packaging Market Trends Business and technology Material Segments China SummaryIEEE Electronics packaging Society (EPS), Santa Clara Valley ChapterFebruary 14, Overview2017-A Record Setting Year 2017 is a record setting year for the industry Semiconductor sales.

2 >$400B for the first time Fabless sales reach the $100B mark for the first time Investments All-time high for CAPEX by single company (Samsung) Equipment spending in Korea will smash previous regional spending record Worldwide equipment billings:~$56 BWorldwide equipment billings: $56B Silicon shipments Also, a rebound in wafer pricingIEEE Electronics packaging Society (EPS), Santa Clara Valley ChapterFebruary 14, $50$60 Semiconductor Equipment Cycles-Revenues to approach $56 billion, a new annual spending $10$20$30$40$50 Annual Growth(%)Semiconductor Revenue($US Billion)Previous spending high was in $48B in $02014201520162017 FSemiconductor EquipmentAnnual Growth Source: SEMI/SEAJ WWSEMSS ilicon Wafer Market-Recovery in Aggregated Average Selling PriceRecord revenues!

3 Peak revenues back in 2007 Declining ASPsRecord shipmentsPeak revenues back in 2007 Several year period of declining ASPs while shipments increased 2017 rebound in ASPs to propel +17% revenue growth6 Source: SEMIIEEE Electronics packaging Society (EPS), Santa Clara Valley ChapterFebruary 14, Industry Outlook and Market Drivers2018 Semiconductor ForecastsIC Insights (Nov 17), Horizons (Jan 18), (Nov 17), Markit (Jan 18), (Jan 18), Research (Jan 18), Research (Nov 17), LRA (Jan 18), : SEMI January 2018 IEEE Electronics packaging Society (EPS), Santa Clara Valley ChapterFebruary 14, $450$500$550 Semiconductor Cycles-Revenues to reach $500 billion by $50$100$150$200$250$300$350$400 Annual Growth(%)Semiconductor Revenue($US Billion) semiconductors are pervasive Key drivers in 2018 are high-performance computing, IoT,and automotive-5%$0$50201420152016 2017F 2018F 2019 FSemiconductor Revenue Annual Growth Source.

4 IC Insights McClean Report, January 2018 Semiconductor Revenue Outlook Beyond 20188%10%0%2%4%6%-4%-2%WSTSIC InsightsGartnerIHS MarkitAlphaOne Capital Partners2020 Source: SEMI January 201820182019 IEEE Electronics packaging Society (EPS), Santa Clara Valley ChapterFebruary 14, Trends and Growth Drivers Data Centers Big Digital SoCs Storage Solid State Memory Gateways Data Collection Hubs IoT Nodes Sensors Actuators Actuators Imagers TransmittersSource: Mentor, A Siemens Business, presented at ISS US January 2018 Source: IHS Markit, presented at ISS US January 2018 Source: VLSI Research, presented at ISS US January 2018 IEEE Electronics packaging Society (EPS), Santa Clara Valley ChapterFebruary 14, Market TrendsBusiness and technology IEEE Electronics packaging Society (EPS), Santa Clara Valley ChapterFebruary 14, Trends and Transitions Wire bond is not dead, but industry evolving to increased packaging and assembly at the wafer level Memory Inflection point.

5 Leadframe to organic substrate packages WB to FC FO-WLP is a disruptive technology Traditional model: Wafer is processed in fab then sent to assembly facility for singulation, assembly , and test New model:Sfttthfdfkid15 Image Source: TechSearch International Some wafers stay at the foundry for packaging and assembly Some OSATs install wafer processing ( like ) equipment to create package on the wafer 2018 TechSearch International, of Outsource PackagingToday: >50+% of packaging revenues Leading new packaging pillar, FO-WLP, SiP, and : ~18% of packaging revenues Emergence of leading Taiwanese andKOSAT i2005: ~40% of packaging revenues Fabless companies grow.

6 IDMs shift to outsourcingImage Source: ASE Korean OSAT companies1985: ~5% of packaging revenues Manufacturing focus in the Philippines PDIP & TransistorsImage Source: SiliconwareSource: Gartner and SEMIIEEE Electronics packaging Society (EPS), Santa Clara Valley ChapterFebruary 14, and assembly Trends SiP remains a hot topic Drivers remain the #1 Heterogeneous integration drives this into high-performance applicationsSili i tfi lld i t ld ti Silicon interposer finally moved into volume production (but small volumes) FPGA with homogeneous and heterogeneous solution GPU + stacked memory Network systems Artificial intelligence Still waiting for the big TSV market, but we have production volumeImage Source.

7 Xilinx production volume DRAM with TSVs for servers HMC HBM Image Source: SK Hynix 2018 TechSearch International, Driving Heterogeneous Integration As the industry moves to the next silicon nodes (10nm, 7nm, etc.) new packaging solutions are need to achieve the economic advantages that were previously met with silicon scaling Heterogeneous integration is considered the answer and is taking various forms: Silicon interposers Alternatives such as Intel s EMIB or Fan-out on Substrate Future organic interposers 2018 TechSearch International, collaboration across the entire supply chainIEEE Electronics packaging Society (EPS), Santa Clara Valley ChapterFebruary 14, Number of FO-WLP Applications Baseband processors Application processors RF transceivers, switches, CODEC ( x mm) ,, Power management integrated circuits (PMIC) Audio CODECs Connectivity modules Radar modules (77 GHz) for automotive MicrocontrollersSImage Source.

8 Module Sensors Logic + memory for data centers and cloud serversSource: Nepes 2018 TechSearch International, Electronics packaging Society (EPS), Santa Clara Valley ChapterFebruary 14, Substrates ~$7B market Stable supply base Wire bond CSP and BGAare declining; while flipWire bond CSP and BGA are declining; while flip chip CSP and BGA are seeing some increase Flat growth in PC; slowing growth in mobile Some substrate suppliers have reduced production with the transition to FO-WLP Some customers relaxing extensive price pressure on suppliersImage Source: Unimicronon suppliers China suppliers increasing capabilitiesSource.

9 SEMI/TechSearch International, Global Semiconductor packaging Materials Outlook (to be published 1Q 2018)Wafer Level Dielectrics ~$200M market currently Numerous suppliers currently in the market New RDL formulations still in development, especially for multi-layer applicationsapplications Low cure temperatures a must WLP dielectrics with good adhesion to metal (Cu) layers and epoxy (in the case of FO-WLP reconstituted wafer) without delamination Low stress WLP dielectric (to match the CTE of the chip) and/or low modulus (for less wafer bow)Source: SEMI/TechSearch International, Global Semiconductor packaging Materials Outlook (to be published 1Q 2018)IEEE Electronics packaging Society (EPS), Santa Clara Valley ChapterFebruary 14, Compounds ~$ market Stable supply base with Japanese suppliers maintaining strong market position Formulations to pass Moisture Sensitivity Level 1 (MSL1) for small packages.

10 Critical for board-level reliability Need smaller fillers and narrower particle size distribution for better warpage control. Especially critical in Source: Kyocera Chemical Clear compounds for optical devices: limited material available as warpage and adhesion issues need to be Source: Towa : SEMI/TechSearch International, Global Semiconductor packaging Materials Outlook (to be published 1Q 2018)Underfill >$200M market for flip chip (higher if under package is included) Stable supply base led by Japanese suppliersCapillary applications challenged with voidfree Capillary applications challenged with void-free filling for finer pitched Cu pillar Flip chip dimensions:Aff d bl NC d ti Fil (NCF)d fillImage Source.


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