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MT9M114 - 1/6‐inch 720p High‐Definition (HD) …

Semiconductor Components Industries, LLC, 2016 June, 2019 Rev. 131 Publication Order Number: MT9M114 /DMT9M1141/6 inch 720p High Definition (HD)System On a Chip (SOC)Digital Image SensorThe MT9M114 from ON Semiconductor is a 1/6-inch MpCMOS digital image sensor with an active-pixel array of 1296 (H) 976 (V). It includes sophisticated camera functions such as autoexposure control, auto white balance, black level control, flickeravoidance, and defect correction. It is designed for low lightperformance. The MT9M114 produces extraordinarily clear, sharpdigital pictures, making it the perfect choice for a wide range ofapplications, including mobile phones, PC and notebook cameras, andgaming 1.

MT9M114 www.onsemi.com 4 1. This typical configuration shows only one scenario out of multiple possible variations for this sensor. 2. If a MIPI Interface is not required, the following signals must be left floating: DATA_P, DATA_N, CLK_P, and CLK_N.

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Transcription of MT9M114 - 1/6‐inch 720p High‐Definition (HD) …

1 Semiconductor Components Industries, LLC, 2016 June, 2019 Rev. 131 Publication Order Number: MT9M114 /DMT9M1141/6 inch 720p High Definition (HD)System On a Chip (SOC)Digital Image SensorThe MT9M114 from ON Semiconductor is a 1/6-inch MpCMOS digital image sensor with an active-pixel array of 1296 (H) 976 (V). It includes sophisticated camera functions such as autoexposure control, auto white balance, black level control, flickeravoidance, and defect correction. It is designed for low lightperformance. The MT9M114 produces extraordinarily clear, sharpdigital pictures, making it the perfect choice for a wide range ofapplications, including mobile phones, PC and notebook cameras, andgaming 1.

2 KEY PERFORMANCE PARAMETERS ParameterTypical ValueOptical Format1/6-inchActive Pixels1296 (H) 976 (V) = MpPixel Filter ArrayRGB BayerShutterElectronic Rolling Shutter (ERS)Input Clock Range6 54 MHzOutput MIPI Data Rate Maximum768 Mb/sMax. Frame Rate30 fps Full fps 720p75 fps VGA120 fps QVGA (Note 2) V/Lux sec (550 nm)SNRMAX37 dBDynamic dBSupply V or VPower Consumption135 mW (Note 1)Operating Temperature Range(Ambient) TA 30 C to 70 CChief Ray Active Imager mm (H) mm (V), mm DiagonalPackage OptionsBare Die, CSP1. Power consumption for typical voltages and 720p Reduced Superior Low-light Performance Ultra-low Power 720p HD Video at 30 Internal Master Clock Generated by On-chipPhase-locked Loop (PLL) Oscillator Electronic Rolling Shutter (ERS),Progressive Scan Integrated Image Flow Processor (IFP) forSingle-die Camera Module Automatic Image Correction andEnhancement Arbitrary Image Scaling with Anti-aliasing Two-wire Serial Interface Providing Accessto Registers and Microcontroller Memory Selectable Output Data Format.

3 YCbCr,565 RGB, 555 RGB, 444 RGB, ProcessedBayer, BT656, RAW8 and RAW8+2-bit Parallel and MIPI Data Output Independently Configurable GammaCorrection Adaptive Polynomial Lens ShadingCorrection UVC Interface Perspective Correction Multi-camera SynchronizationApplications Embedded Notebook, Netbook, and DesktopMonitor Cameras Tethered PC Cameras Game Consoles Cell Phones, Mobile Devices, and ConsumerVideo Communications Surveillance, Medical, and IndustrialApplicationsSee detailed ordering and shipping information on page 2 ofthis data INFORMATIONODCSP55 INFORMATIONT able 2. AVAILABLE PART NUMBERS Part NumberProduct DescriptionOrderable Product Attribute DescriptionMT9M114D00 STCZK24BC1 2001 MP 1/6 SOCDie Sales, 200mm ThicknessMT9M114 EBLSTCZ CR11 MP 1/6 SOC CISChip Tray without Protective FilmMT9M114 EBLSTCZ CR1 MP 1/6 SOC CISChip Tray without Protective FilmSee the ON Semiconductor Device Nomenclaturedocument (TND310/D) for a full description of the namingconvention used for image sensors.

4 For referencedocumentation, including information on evaluation kits,please visit our web site at DESCRIPTIONThe MT9M114 from ON Semiconductor is a 1 Mp CMOS digital image sensor with an integratedadvanced camera system. This camera system featuresa microcontroller (MCU), a sophisticated image flowprocessor (IFP), MIPI and parallel output ports (only oneoutput port can be used at a time). The microcontrollermanages all functions of the camera system and sets keyoperation parameters for the sensor core to optimize thequality of raw image data entering the IFP. The IFP will beresponsible for processing and enhancing the entire system-on-a-chip (SOC) has superior low-lightperformance that is particularly suitable for PC cameraapplications.

5 The MT9M114 features ON Semiconductor sbreakthrough low-noise CMOS imaging technology thatachieves near-CCD image quality (based on signal-to-noiseratio and low-light sensitivity) while maintaining theinherent size, cost, and integration advantages of MT9M114 can be operated in its default mode orprogrammed for frame size, exposure, gain, and otherparameters. The default mode output is a 720p image size at30 frames per second (fps), assuming a 24 MHz input outputs 8-bit data, using the parallel output OVERVIEWThe MT9M114 combines a Mp sensor core with anIFP to form a stand-alone solution for both imageacquisition and processing. Both the sensor core and the IFPhave internal registers that can be controlled by the user.

6 Innormal operation, an integrated microcontrollerautonomously controls most aspects of processed image data is transmitted to the host systemeither through the parallel or MIPI interface. Figure1 showsthe major functional blocks of the 1. MT9M114 Block DiagramSensor CorePixel ArrayPORTwo-wire Serial IFSystem ControlImage Flow Processor (IFP)Color PipelineStats EngineInternal Register BusROMM icrocontrollerSRAMM icrocontroller Unit (MCU)Output CoreThe MT9M114 has a color image sensor with a Bayercolor filter arrangement and a active-pixel array withelectronic rolling shutter (ERS). The sensor core readout is10 bits and can be flipped and/or mirrored. The sensor corealso supports separate analog and digital gain for all fourcolor channels (R, Gr, Gb, B).

7 Image Flow Processor (IFP)The advanced IFP features and flexible programmabilityof the MT9M114 can enhance and optimize the imagesensor performance. Built-in optimization algorithmsenable the MT9M114 to operate with factory settings asa fully automatic and highly adaptable system-on-a-chip(SOC) for most camera algorithms include black level conditioning,shading correction, defect correction, color interpolation,edge detection, color correction, vertical perspectivecorrection, aperture correction, and image formatting withcropping and Unit (MCU)The MCU communicates with all functional blocks byway of an internal ON Semiconductor proprietary businterface. The MCU firmware configures all the registers inthe sensor core and ControlThe MT9M114 has a phase-locked loop (PLL) oscillatorthat can generate the internal sensor clock from a commonwireless system clock.

8 The PLL adjusts the incoming clockfrequency up, allowing the MT9M114 to run at almost anydesired resolution and frame rate within the sensor scapabilities. Low-power consumption is a very MT9M114 provides power-conserving featuresincluding a soft standby mode. A two-wire serial interfacebus enables read and write access to the MT9M114 sinternal registers and variables. The internal registerscontrol the sensor core, the color pipeline flow, and theoutput interface. Variables are located in themicrocontroller s RAM memory and are used to configureand control the auto-algorithms and camera InterfaceThe output interface block can select either raw data orprocessed data.

9 Image data is provided to the host systemeither by an 8-bit parallel port or by a serial MIPI parallel output port provides 8-bit RGB data orextended 10-bit Bayer MT9M114 also includes programmable I/O slew rateto minimize InterfacesFigure 2 shows typical MT9M114 device low-noise operation, the MT9M114 requires separatepower supplies for analog and digital sections of the power supply rails must be decoupled from groundusing capacitors as close as possible to the die. The use ofinductance filters is not recommended on the power suppliesor output MT9M114 provides dedicated signals for digitalcore, PHY, and I/O power domains that can be at differentvoltages. The PLL and analog circuitry require clean powersources.

10 Table 3 provides the signal descriptions for This typical configuration shows only one scenario out of multiple possible variations for this If a MIPI Interface is not required, the following signals must be left floating: DATA_P, DATA_N, CLK_P, and CLK_N. The VDD_PHY powersignal must always be connected to the V Only one of the output modes (serial or parallel) can be used at any ON Semiconductor recommends a kW resistor value for the two-wire serial interface RPULL-UP; however, greater values may be usedfor slower transmission All inputs must be configured with RESET_BAR and CONFIG both have internal pull-up resistors and can be left ON Semiconductor recommends that and 1mF decoupling capacitors for each power supply are mounted as close as possible tothe pad.


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